Implementation of smoothing apparatus for an independently clock

Multiplex communications – Wide area network – Packet switching

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Details

370108, 370112, H04J 306

Patent

active

048499692

ABSTRACT:
A method and apparatus are disclosed for preserving a minimum or maximum interpacket gap length in an independently clocked data network, typically one following the ANSI-FDDI standard. A smoother is placed downstream of each elastic buffer in the network. The smoother detects the occurrence in an arriving stream of bytes of short preambles, i.e., those having fewer than a threshold number of idle bytes, and inserts some number n.sub.a additional idle bytes into such preambles. Subsequently arriving bytes are delayed by n.sub.a byte clock periods by, in a preferred embodiment, storing them in a FIFO sequence of registers. In order to be available for lengthening other short preambles when they arrive, the smoother also detects the arrival of long preambles, i.e., those having more than the threshold number of idle bytes, and deletes a number n.sub.d idle bytes from such long preambles. Deletion is accomplished in the preferred embodiment by reducing the delay of the stream, which in turn is accomplished by reducing the length of the FIFO sequence of delay registers by n.sub.d registers. Idle bytes which may have been temporarily stored in delay registers which are no longer part of the FIFO sequence are discarded. This reduces the extension of the smoother and makes it available for inserting idle bytes into subsequently arriving short preambles. The method and apparatus can be expanded to provide several extended states at each of several different thresholds. It can also be applied in a network requiring a maximum interpacket gap length by providing a normal state and one or more contracted states.

REFERENCES:
patent: 4154984 (1979-05-01), Murasov
patent: 4402079 (1983-08-01), Fellinger et al.
patent: 4594228 (1986-06-01), Niquel et al.

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