Implementation of multicast in an ATM switch

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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C370S395310, C370S432000

Reexamination Certificate

active

06822958

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention generally relates to a cell switch for use in an asynchronous transfer mode (ATM) network; and in particular, to a cell switch supporting multicast connections and providing connection failure detection and handling in an ATM network.
2. Background of the Invention
Asynchronous transfer mode (ATM) is a cell relay data transmission technique selected as the transport scheme for the B-ISDN (Broadband Integrated Services Digital Network) standard. ATM Communication networks have applications in high speed digital communication carried in such media as synchronous optical networks. An ATM network transmits data of all types (e.g., voice, data, and video) based on asynchronous time division multiplexing. The data are transmitted in the form of fixed-length data packets, called “ATM cells.” An ATM cell is 53 bytes long, of which 5 bytes are the cell header and 48 bytes are the cell payload. The cell header carries information used for identification and routing. Traffic within an ATM network is routed through connection nodes within the network where the connection nodes are in turns connected via one or more. ATM switches. An ATM switch in an ATM network is primarily responsible for routing the cells to their respective destinations.
An ATM network uses the concepts of “virtual paths” (VP) and “virtual channels” (VC) to allow routing of ATM cells between adjacent connection nodes. Therefore, the cell header of an ATM cell does not specify the full destination address. Rather, the cell header includes, among other things, an 8-bit virtual path identifier (VPI) and a 2-byte virtual channel identifier (VCI) (sometimes referred to as virtual connection identifier), identifying the virtual path and the virtual channel of the cell's next switching stage. The VPI and VCI together identify the connection, called a virtual connection (VC), to which an ATM cell belongs. The cell header of an ATM cell is updated at each switching stage to include the VPI and VCI values of the next switching stage.
Communications in an ATM network can take the form of unicast or multicast. In unicast communication, ATM cells from a sender are transmitted to one recipient only. On the other hand, multicast refers to a “point-to-multipoint connection.” In multicast data communication, a sender sends the same ATM cells simultaneously to several recipients within the network. Broadcast is the extreme case of multicast where every user on the network receives the data transmitted by the sender. Recently, there is an increasing demand for multicasting in ATM networks and efficient implementations of multicasting are, therefore, desired.
FIG. 1
illustrates a multicast communication in an ATM network. In
FIG. 1
, a computer, denoted PC
22
, communicates with other computers, PCs
12
-
16
, through an ATM network
10
including ATM switches
24
-
27
. PC
22
intends to send the same data traffic to recipient PCs
12
-
16
. If ATM network
10
does not support multicasting, PC
22
has to replicate the data for each recipient and send the data separately to each of recipient PCs
12
-
16
. This method becomes very inefficient when the number of recipients is large. In ATM network
10
which supports multicasting, PC
22
sends data traffic to multiple recipients (PCs
12
-
16
) without having to transmit the data more than once. ATM switches
24
-
27
are responsible for directing the data traffic received from PC
22
to all of the intended recipients in network
10
.
A conventional implementation of multicasting in an ATM network involves replicating the cells within the network and assigning the correct VPI/VCI values for each cell for routing to the multiple recipients. For example, in ATM network
10
, PCs
12
-
16
, belonging to the same multicast group for receiving multicast data traffic from PC
22
, are put on a multicast list. ATM network
10
establishes the necessary connections according to the multicast list. When PC
22
sends multicast ATM cells to switch
24
, switch
24
replicates the cells and sends the cells to the destination switches according to the multicast list. Here, switch
24
sends replicated multicast ATM cells to switches
25
,
26
and
27
. Switch
25
in turn replicates the ATM cells and sends the cells to PCs
12
and
13
. Similarly, switch
27
replicates and transmits the multicast ATM cells to PCs
15
and
16
. Meanwhile, switch
26
transmits the ATM cells to PC
14
without any replication since switch
26
only needs to service one recipient.
A conventional ATM switch used to connect a number of connection nodes within an ATM network is illustrated in FIG.
2
. ATM switch
30
includes input ports
31
a-c
, switching elements
32
a-c
, and output ports
33
a-c
. The input ports, the switching elements, and the output ports are interconnected to form switch fabric which enables an ATM cell at any input port to be routed to any specified output port. ATM switch
30
further includes a controller
38
for controlling the operation of the switch, including setting up the input and output ports (through buses
35
and
37
) and managing all of the switch traffic moving through switch fabric
34
(through bus
36
).
To implement multicasting in ATM switch
30
, multicast cells received at any of input ports
31
a-c
are replicated by switching elements
32
a-c
and then provided to the respective output ports
33
a-c
for transmitting to the next switching stage. Thus, switching elements
32
a-c
must include a sufficiently large memory for storing all of the replicated multicast cells.
Although implementation of multicasting based on cell replication provides flexibility, the implementation has several disadvantages. First, replication requires a large amount of redundant cell memory space in each of the ATM switches to store the replicated cells. The large memory requirement results in a large hardware implementation. Second, besides a large memory requirement, replication requires a large bandwidth to handle the large numbers of replicated cells. Furthermore, the input process could be on-hold until the replication at the output process is completed. In such case, implementation of multicast by replication tends to result in an inefficient use of resources.
To avoid cell replication in multicast connections, an ATM switch can be implemented using a central memory topology as illustrated in FIG.
3
. In ATM switch
42
of
FIG. 3
, ATM cells received on input ports
44
a-h
are stored in a main cell memory
45
. A controller
43
in ATM switch
42
is responsible for commanding the storage of incoming ATM cells and managing the data flow through switch
42
. To transmit ATM cells, controller
43
accesses the memory locations where the ATM cells are stored and provides a copy of the cell to a buffer associated with the selected one of output ports
46
a-h
. Controller
43
is also responsible for updating the cell header information for the outgoing ATM cell. Output ports
46
a-h
transmit the ATM cells in their respective buffers together with the updated cell header values.
To establish multicast communications, the output ports desiring to receive multicast communications from a certain input port are put on a multicast list maintained by controller
43
. To transmit a multicast cell to a number of output ports
46
a-h
, controller
43
accesses the stored multicast cell multiple times for each output port on the multicast list. Controller
43
modifies the header information (such as VPI/VCI values) of the multicast cell for each destination output port. In this manner, multicasting in an ATM switch employing a central memory topology can be implemented without replication of the multicast ATM cells. However, the above-described implementation of multicasting is often complex and therefore, places severe constraints on the multicasting capability of the ATM switch.
FIG. 4
illustrates another implementation of multicasting in ATM switch
42
of FIG.
3
. In this implementation, controller
43
of A

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