Implementation of instruction for a branch which can cross one p

Boots – shoes – and leggings

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G06F 932

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active

044491859

ABSTRACT:
In a data processing system having a memory and employing N-bit bytes and two byte addresses, a branch instruction which can cross one page boundary is executed without having to use calculations to effect a change in the contents of the program counter (PC). It is determined whether the value V1 of the (N-1) least significant bits (LSB's ) of the lower order byte of the two byte branch address is greater or less than the value V2 of the (N-1) least significant bits (LSB's) of the lower order byte of the address to which the PC is pointing and also whether PC N.noteq.BR N where PC N and BR N are the most significant bits of the lower order bytes of the PC address and the branch address, respectively. If V1<V2, PC N=1, and PC N.noteq.BR N, the upper order byte of the PC address is incremented by 1 and if V1>V2, PC N=0, and PC N.noteq.BR 7, the upper order byte of the PC address is decremented by 1.

REFERENCES:
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patent: 3728689 (1973-04-01), Edwards, Jr.
patent: 3728690 (1973-04-01), Hotley et al.
patent: 3786436 (1974-01-01), Zelinski et al.
patent: 4016545 (1977-04-01), Lipovski
patent: 4156905 (1979-05-01), Fassbender
patent: 4179738 (1979-12-01), Fairchild et al.
patent: 4195339 (1980-03-01), Smith et al.

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