Implementation of digital filter with reduced hardware

Pulse or digital communications – Equalizers

Reexamination Certificate

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C375S350000, C708S319000

Reexamination Certificate

active

06983012

ABSTRACT:
A digital filter function requires many coefficient multiplications. Instead of implementing the multiplications individually as multipliers, they may be implemented using traverse or shift operations. This approach uses the relation among the coefficients of the digital filter to reduce required hardware. A disclosed digital filter uses scalers and sample combiners for processing samples of a digital input stream. Each scaler scales a respective input sample from one of the combiners, preferably by a different power of 2. The combining circuits combine sets of samples, from the digital input stream and from the digital output of the filter, to form the input samples for processing by the scalers. An adder totals the respective scaled values, to form the digital output stream of the filter. The digital filter may be used in a variety of digital signal processing applications, but is particularly useful in low-power portable devices, such as wireless spread-spectrum receivers.

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