Impedance maintenance circuit for telephone interface

Details Impedance maintenance circuit for telephone interface Impedance maintenance circuit for telephone interface

1985-10-04

1987-07-28

Dwyer, James L.

Telephonic communications

Line equalization or impedance matching

323314, H04M 100, H04M 1900

Patent

active

046833510

ABSTRACT:
Circuitry for supplying power to low-level DIALER portions of a telecommunications integrated circuit device comprises a PNP current sourcing transistor mirrored to a bypass transistor. The bypass transistor is coupled across the TIP and RING terminals of the subscriber line so as to maintain current flow sufficient to prevent the central office from "dropping out". A sensing transistor drives a current sink coupled to the current sourcing transistor in order to prevent that transistor from dropping into saturation and degrading the necessarily high impedance level that must be presented across the subscriber line. Saturation is prevented through the operation of a circuit loop that includes the base-collector junction of the current sourcing transistor, the emitter to-base junction of the sensing transistor, and a voltage offset element. When the base-collector voltage of the current sourcing transistor approaches to a predetermined level determined by the voltage offset, the level chosen to be indicative of a tendency toward saturation, the sensing transistor begins to conduct, thereby driving a current sink into conduction and imposing an additional load on the current sourcing transistor. The additional load prevents the current sourcing transistor from falling into saturation.

REFERENCES:
patent: 4354060 (1982-10-01), Niertit et al.

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