Impedance controlled output driver

Details Impedance controlled output driver Impedance controlled output driver

1998-12-28

2000-12-19

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

327170, H03B 100

Patent

active

061631787

ABSTRACT:
An output driver has an output multiplexor and an output current driver. The output multiplexor receives a data signal and outputs a q-node signal. The output current driver receives the q-node signal and drives a bus based on the q-node signal. The output multiplexor processes the data signal in various ways to generate the q-node signal. The output current driver is responsive to current control bits to select a amount of output drive current. In addition, the output multiplexor is controlled such that the output impedance of the output current driver is maintained within a predetermined range.

REFERENCES:
patent: 5194765 (1993-03-01), Dunlop et al.
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 5430400 (1995-07-01), Herlein
patent: 5530377 (1996-06-01), Walls
patent: 5949254 (1999-09-01), Keeth
Allen, Arnold O., Probability, Statistics, and Queueing Theory with Computer Science Applications, 2.sup.nd Edition, CH 7, pp. 450, 458-459.
Chappell, Terry I. et al., A 2ns Cycle, 4ns Access 512 kb CMOS ECL SRAM, IEEE International Solid State Circuits Conference 1991, pp. 50-51.
Donnelly, Kevin S et al., A 660 MB.sctn. Interface Megacell Portable Circuit in 0.3 .mu.m-0.7 .mu.m CMOS ASIC, IEEE Journal of Solid State Circuits, vol. 31, No. 12, Dec. 1996, pp. 1995-2003.
Pilo, Harold et al., A 300 MHz 3.3V 1 Mb SRAM Fabricated in a 0.5 .mu.m CMOS Process, IEEE International Solid State Circuits Conference 1996, pp. 148-149.
Schumacher, Hans-Jurgen et al., CMOS Subnanosecond True-ECL Output Buffer, IEEE Journal of Solid-State Circuits, vol. 25, No. 1, Feb. 1990 pp. 150-154.
Sidiropoulos, Stefanos et al., A 700-Mb/s/pin CMOS Signaling Interface Using Current Integrating Receivers, IEEE Journal of Solid-State Circuits, vol. 32, No. 5, May 1997, pp. 681-690.
Yang, Tsen-Shau et al., A 4-ns 4Kx1-bit Two-Port BiCMOS SRAM, IEEE Journal of D-State Circuits, vol. 23, No. 5, Oct. 1988 pp. 1030-1040.

Affiliated with

Also associated with

Rating

Impedance controlled output driver does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Impedance controlled output driver, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Impedance controlled output driver will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-273919