Impedance control circuit for a semiconductor substrate

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307304, 3072968, H03K 301

Patent

active

052705838

ABSTRACT:
The semiconductor circuit device comprises a substrate bias generating circuit, a substrate voltage detecting circuit, and a substrate impedance adjusting circuit. When the detected substrate voltage decreases below a predetermined level, the substrate impedance adjusting circuit forms a through route between a substrate voltage terminal and any given terminal higher in potential than the substrate voltage terminal, to increase the substrate voltage at high speed, thus stabilizing threshold voltages or operation limit voltages of device elements which are subjected to the influence of the substrate voltage. Further, when the substrate voltage returns to the predetermined level, the substrate impedance adjusting circuit cuts off the formed through route for reduction of power consumption.

REFERENCES:
patent: 4438346 (1984-03-01), Chuang et al.
patent: 4571505 (1986-02-01), Eaton, Jr.
patent: 4670668 (1987-06-01), Liu
patent: 4716307 (1987-12-01), Aoyama
patent: 4794278 (1988-12-01), Vajdic
patent: 5057704 (1991-10-01), Koyanagi et al.

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