Amplifiers – With semiconductor amplifying device – Including field effect transistor
Patent
1996-11-04
1999-01-19
Mullins, James B.
Amplifiers
With semiconductor amplifying device
Including field effect transistor
330256, 381120, H03F 3185
Patent
active
058617795
ABSTRACT:
An impedance matching, reducing, or buffering circuit for permitting smooth signal flow from a first transmission medium to a second transmission medium. The circuit provides a first node adapted for coupling to the first transmission medium and for receiving a signal from the first transmission medium. The circuit further provides a buried channel transistor, that is coupled to the first node and that is biased by additional circuit devices, for transforming the impedance imposed on the signal. The use of the buried mode transistor reduces noise on the surface of the transistor while at the same time keeps other performance standards high. The circuit additionally provides a second node that is coupled to the buried channel transistor and that is adapted for coupling to the second transmission medium for conveying the signal to the second transmission medium.
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Boor Steven E.
Loeppert Peter V.
Knowles Electronics, Inc.
Mullins James B.
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