Imaging circuit having Interlaced and non-interlaced mode

Details Imaging circuit having Interlaced and non-interlaced mode Imaging circuit having Interlaced and non-interlaced mode

1996-10-03

1998-11-17

Faile, Andrew I.

Television

Camera, system and detail

Solid-state image sensor

348222, 348446, H04N 314, H04N 701, H04N 5228

Patent

active

058383735

ABSTRACT:
An imaging circuit includes a solid state imaging device, an A/D converter for converting light receiving signals outputted from the solid state imaging device to digital signals, and a driving unit for supplying clock signals to the solid state imaging device and the A/D converter. The solid state imaging device has a first mode in which the light receiving signals on two adjacent scanning lines arranged in the vertical direction are added to each other and outputted, and a second mode in which the light receiving signals on one scanning line are sequentially outputted in units of scanning lines, the first and second modes being optionally selectable in accordance with a predetermined mode selection signal. In the driving unit, when the solid state imaging device is selected to the first mode, a clock signal having a first repetitive frequency is transmitted to the solid state imaging device and another clock signal having a second repetitive frequency lower than the first repetitive frequency is transmitted to the A/D converter, and when the solid state imaging device is selected to the second mode, a clock signal having a predetermined repetitive frequency is transmitted to the solid state imaging device and the A/D converter.

REFERENCES:
patent: 4943850 (1990-07-01), Asaida
patent: 5051832 (1991-09-01), Losee et al.
patent: 5272535 (1993-12-01), Elabd
patent: 5394187 (1995-02-01), Shipp
patent: 5402171 (1995-03-01), Tagami et al.
patent: 5631701 (1997-05-01), Miyake
patent: 5734424 (1998-03-01), Sasaki

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