Imager cell with pinned transfer gate

Details Imager cell with pinned transfer gate Imager cell with pinned transfer gate

2001-10-15

2004-07-13

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Light responsive structure

C257S221000, C257S222000, C257S223000

Reexamination Certificate

active

06762441

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to electronic imaging devices, and in particular to a CMOS imager cell incorporating a “pinned transfer gate”.
2. Related Art
Electronic imaging devices (“imagers”) find use in a broad range of applications in many distinct fields of technology including the consumer, industrial, medical, defense and scientific fields. Imagers use an array of photoreceptors to convert photons bearing image information into electrical signals representative of the image.
In recent years, CMOS imagers have become a practical implementation option and provide cost and power advantages over other technologies such as charge coupled devices (CCD). A conventional CMOS imager is typically structured as an array of imager cells, each of which includes a photoreceptor approximately reset to a known potential in preparation for integration and readout of an image. The performance of a CMOS imager depends heavily on the performance of the individual imager cells.
In the past, the imager cells took the form of either passive photoreceptor cells, active photoreceptor cells, or transfer gate active photoreceptor cells. The passive photoreceptor cells typically included a photodiode for collecting photocharge and a single access transistor to connect the photodiode to a readout bus. However, passive photoreceptor cells, while having high quantum efficiency, were plagued with high read noise. As a result, imagers began to incorporate active photoreceptor cells. The active photoreceptor cells included a photoreceptor, and either three or four support transistors. The support transistors included a reset transistor, source follower transistor (for buffering and amplifying the collector photocharge), and an access transistor for connecting the photoreceptor to a readout bus. In transfer gate active photoreceptor cells, a fourth transfer gate transistor was used to transfer photocharge from the photoreceptor to a sense node, thereby allowing correlated double sampling, and a corresponding decrease in read and dark current noise.
Active photoreceptor cells, however, exposed far less photoreceptor area to incident light due to the overlying support transistor structures. Furthermore, the n+ contacts used in active photoreceptor cells generated significant dark current, thereby undesirably altering images during integration and readout. In addition, prior photoreceptor cells were not tailored to provide adequate response over a wide range of light levels, nor to blue light in particular.
A need exists for an improved imager cell that addresses the problems noted above and other previously experienced.
SUMMARY
An improved imager cell is arrived at by incorporating a “pinned transfer gate” between a photoreceptor and a sense node. The imager cell may be broadly conceptualized as a light detecting element with low noise characteristics that is configurable for a wide range of charge capacity, for a wide range of light levels, with enhanced blue light response, as compared to conventional imager cell implementations.
One implementation of the imager cell includes a photoreceptor, a sense node, and a pinned transfer gate. The pinned transfer gate is disposed to transfer charge between the photoreceptor and the sense node. As discussed in more detail below, the pinned transfer gate may be a shallow p-doped pinned region in an n-doped transfer region. The photoreceptor, as examples, may be implemented as a photogate or a photodiode, with an accompanying photoreceptor readout gate.
The imager cell may further include a reset transistor disposed to reset the sense node, and an output amplifier (for example, a source follower amplifier) coupled to the sense node. Control circuitry supplies a photoreceptor readout clock to the photoreceptor. The readout clock includes an integration period and a transfer period. During the integration period, the readout clock is at an integration voltage V+ which may be varied to setup a desired charge capacity in the photoreceptor.
Modifications to the imager cell may be included to enhance blue light response. In particular, the photoreceptor may have some gate material removed to form a photoreceptor readout gate light aperture above the photoreceptor (also referred to a “poly hole”. The light aperture allows light to pass directly into the photoreceptor without passing through the gate which absorbs blue photons before they enter the photoreceptor. In addition, dark current performance is enhanced by fabricating a pinned aperture region under the light aperture.
In an alternative implementation, the thickness of the photoreceptor readout gate is adjusted to enhance blue light response of the imager cell. In particular, the photoreceptor readout gate is made relatively thin (also referred to as a “gate”). Generally, the photoreceptor readout gate is less than 2000 Angstroms thick, and may vary depending on considerations which are explained in more detail below.
Related methods of manufacturing the imager cells are discussed below.
The control circuitry associated with the imager cell provides several modes of operation. One mode is a “snap” mode, and another mode is a selective charge capacity mode. In the snap mode, the control circuitry supplies a photoreceptor readout clock simultaneously to a set of photoreceptor readout gates. As a result, accumulated charge in each photoreceptor is transferred to the sense node for each respective photoreceptor in one clock cycle. The snap mode thereby provides a “snapshot” of an image at an instant in time (on the order of one micro-second). In the selective charge capacity mode, the integration voltage V+ is set according to a desired charge capacity for the imager cell.
Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.


REFERENCES:
patent: 4994875 (1991-02-01), Hynecek
patent: 5077592 (1991-12-01), Janesick
patent: 5121214 (1992-06-01), Turko et al.
patent: 2002/0121655 (2002-09-01), Zheng et al.
patent: 2002/0121656 (2002-09-01), Guidash

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