Image track display apparatus

Details Image track display apparatus Image track display apparatus

1989-03-31

1990-08-21

Peng, John K.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358105, 358167, 434369, H04N 718, H04N 5213

Patent

active

049511378

ABSTRACT:
Image track display apparatus including a memory for delaying an image signal by at least one vertical scanning period, a first subtraction circuit for taking a first difference signal between the image signal and its delayed image signal through the memory. The first difference signal includes first and second polarity components, a non-linear processing circuit for multiplying the one polarity component of the first difference signal by K times (0<K<1) and for reducing the other polarity component of the first difference signal to the zero value when the other polarity component exceeds a prescribed value, a second subtraction circuit for taking a second difference signal between the output signal of the non-linear processing circuit and the image signal, and a display device for displaying the delayed image signal obtained through the memory circuit.

REFERENCES:
patent: 4058836 (1977-11-01), Drewery et al.
patent: 4246610 (1981-01-01), Takahashi
patent: 4291333 (1981-09-01), Warnock et al.
patent: 4333104 (1982-06-01), Geller
patent: 4748499 (1988-05-01), Ueda
patent: 4807034 (1989-02-01), Takeuchi et al.
patent: 4833537 (1989-05-01), Takeuchi et al.

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