Television – Image signal processing circuitry specific to television – With details of static storage device
Patent
1994-07-13
1996-06-04
Metjahic, Safet
Television
Image signal processing circuitry specific to television
With details of static storage device
358337, 360 351, 369 4433, H04N 5907
Patent
active
055237991
ABSTRACT:
A memory capable of memorizing a video signal has part of its address area into which an information signal is inhibited from being written. A writing address controller for cyclically specifying writing addresses of the memory cyclically specifies writing addresses in the remaining address area except for the part of address area to allow a plurality of different moving picture scenes to be memorized in the one and same memory.
For according to a large capacity main memory, a sub-memory is interposed to access to the main memory with a predetermined information amount being as the unit, thereby facilitating address management of the main memory as well as improving a utilizing effeciency of the main memory.
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Woodham et al., "A Solid State `Action Replay` Recorder", Symposium Record Broadcast Sessions, Jun. 1989, Montreux, CH, pp. 289-295.
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Kingelhofer et al., "HDTV Digital Frame Recorder", SMPTE Journal, vol. 100, No. 1, Jan. 1991, Scarsdale, New York, pp. 10-13.
Hattori Yuichiro
Nakaya Akira
Yamazaki Tatsuro
Canon Kabushika Kaisha
Metjahic Safet
Murrell Jeffrey S.
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