Image signal processing circuit having a multiple port memory

Details Image signal processing circuit having a multiple port memory Image signal processing circuit having a multiple port memory

1991-01-22

1994-01-04

Shaw, Dale M.

Static information storage and retrieval

Magnetic bubbles

Guide structure

395163, 36523005, G06F 1520

Patent

active

052768031

ABSTRACT:
A circuit has a multiple port memory and a plurality of processor elements having write and/or read addresses connected to addresses of the multiple port memory. A register, a delay circuit and/or a buffer memory may be formed among the processor elements in dependence on the connections of the write and read addresses.

REFERENCES:
patent: 4791580 (1988-12-01), Sherrill et al.
patent: 4823281 (1989-04-01), Evangelisti et al.
patent: 4941107 (1990-07-01), Hasebe
NEC Research and Development No. 93, Apr., 1989, Tokyo JP pp. 63-71 M. Iwashita et al. "A Fine Grained data Flow Machine and Its Concurrent Mechanism" pp. 63-69 chpts. 1-4, FIGS. 1-5, 9.
IEEE International Solid State Circuits Conference 1985, New York US pp. 38-39 S. Ishimoto et al. A 256K Dual Port Memory.
Proceedings of the 1988 International Conference in Parallel Processing vol. 1. Aug. 1988, University Park, USA pp. 452-461 M. H. Sunwoo, J. K. Aggarwal "Flexibly Coupled Multiprocessors for Image Processing".

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