Image signal interpolating circuit for calculating interpolated

Computer graphics processing and selective visual display system – Display driving control circuitry – Controlling the condition of display elements

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395164, 395166, 345189, G06F 1562

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active

053965922

ABSTRACT:
An image signal interpolating circuit including a plurality of integrated circuits 31, each integrated circuit 31 including therein memories 40 to 43 for holding respective pixel data of 2.times.2 dots, operational or computational elements 44 to 47 for calculating interpolated values on the basis of respective pixel data of 2.times.2 dots, and an input/output control section 36. The plurality of integrated circuits are arrayed to calculate interpolated value between respective pixels of a pixel block of 2n.times.2m dots.

REFERENCES:
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patent: 5008752 (1991-04-01), Van Nostrand
patent: 5060172 (1991-10-01), Engelse et al.
Signal Processing of HDTV, 11 Aug. 1989, Turin, Italy, pp. 331-338, XP000215254, Tamitani et al.: "A Real-Time HDTV Signal Processor-Architecture and Implementation."
Patent Abstracts of Japan, vol. 005, No. 034 (E-048), 4 Mar. 1981 & JP-A-55 158 771 (NEC Corporation) 10 Dec. 1980.
IEEE Transactions on Circuits and Systems, vol. CAS33, No. 2, Feb. 1986, New York, US, pp. 250-259; Fortier et al.: "Architectures for VLSI Implementation of Movement-Compensated Video Processors."

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