Image sensor with analog-to-digital converter that generates...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S161000, C341S169000, C341S170000

Reexamination Certificate

active

06545624

ABSTRACT:

BACKGROUND OF THE INVENTION
This present invention relates generally to image processing and, more particularly, to a CMOS image sensor using a programmable analog-to-digital converter (ADC).
As developments in CMOS image sensor technology continue, CMOS imagers are increasingly displacing charge-coupled devices (CCDs) as the image sensor of choice. There are a variety of reasons for this shift in imager preference. First, CCD imagers require specialized facilities, which are dedicated exclusively to CCDs. Second CCD imagers consume a substantial amount of power, since they are essentially capacitive devices, which require external control signals and large clock swings to achieve acceptable charge transfer efficiencies. Third, CCD imagers require various support chips to operate the device, condition the image signal, perform. post processing and generate standard video output. This additional support circuity makes CCD systems complex, and requires numerous power supplies, clock drivers and voltage regulators, which consume significant amounts of power.
By contrast, CMOS imagers have a less complex design, compared to CCD imagers, which leads to a reduction in engineering and production costs. Because of the simple architecture, CMOS imagers consume substantially less power than CCD imagers. The less complex design, CMOS imagers have a higher level of integration capability, and an entire CMOS-based imaging system, for example a digital camera, can even be built on a single semiconductor chip. Also, unlike CCD imagers, CMOS imagers are amenable to being manufactured in standard CMOS fabrication facilities. The ability to utilize standard CMOS fabrication facilities can significantly reduces plant overhead costs.
A CMOS imaging system includes, among other things, a bank of analog-to-digital converters (ADC), which operate to convert analog signals, provided by pixels within a pixel array, into a digital format. One way of accomplishing this is to use what is known as a single slope ADC.
An inherent characteristic of the single slope ADC is that it treats all light levels the same, i.e., it coverts all analog light levels at the same resolution. This unvarying characteristic can be problematic, particularly at very low or very high illumination levels. For instance, at low light levels, a pixel output is limited by pixel noise, which can only be overcome by providing higher resolution processing. And, for high light levels, although a pixel output is affected by illumination shot noise, enhanced resolution is not only unnecessary, it is also unwanted, since enhanced resolution under such conditions reduces the dynamic range of the imager.
In light of the foregoing, what is needed is an imaging system having an ADC that provides variable resolution under varying illumination conditions.
SUMMARY OF THE INVENTION
The present invention provides methods and apparatus implementing an improved CMOS imaging system. In one aspect of the invention, a programmable analog-to-digital converter (ADC) is provided for a CMOS imaging system having an array of pixels, the ADC is configured to provide a first conversion resolution for pixels providing a first analog voltage level and a second conversion resolution for pixels providing a second analog voltage level.
In another aspect of the invention, an ADC is provided for converting an analog pixel voltage to a digital representation thereof. This particular embodiment includes: a programmable ramp voltage generator configured to produce a multi-slope ramp voltage signal; a digital counter coupled to an input of the ramp voltage generator and configured to provide the digital representation; a comparator having a first input coupled to an output of the ramp voltage generator and a second input coupled to the analog pixel voltage; and a switch configured to selectively couple the digital representation to a digital storage upon a change in a voltage at the output of the comparator.
In another embodiment of the invention, a CMOS imaging system is provided, the system including: a pixel array; a row decoder coupled to the pixel array and configured to select a row of pixels within the pixel array; and a programmable multi-slope ADC coupled to the pixel array.
In yet another aspect of the present invention, a method is provided for converting an analog pixel signal to a digital representation thereof. In this exemplary method, steps are provided for varying the resolution of the conversion, depending on the illumination level of the analog pixel value, and during a single conversion cycle.
A better understanding of the nature and advantages of the present invention may be gained with reference to the detailed description below, the drawings and the appended claims.


REFERENCES:
patent: 4843395 (1989-06-01), Morse
patent: 6137432 (2000-10-01), Xiao
patent: 6271785 (2001-08-01), Martin et al.
Daniel J. Friedman et al., “An interline CCD imaging array with on-chip A/D conversion”, Proceedings SPIE—The International Society for Optical Engineering, Feb. 7-8, 1994.
Woodward Yang et al., “WA 17.3: An Integrated 800×600 CMOS Imaging System”, 1999 IEEE International Solid-State Circuits Conference, 1999 Digest of Technical Papers, Feb. 15-17, 1999.
Woodward Yang et al., “WA 17.3: An Integrated 800×600 CMOS Imaging System”, 1999 IEEE International Solid-State Circuits Conference, Slide Supplement 1999 to the Digest of Technical Papers, Feb. 15-17, 1999.

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