Image sensor and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material

Reexamination Certificate

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Details

C257S072000

Reexamination Certificate

active

06600172

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image sensor and a method of fabricating the same and more particularly, to an image sensor comprising photoelectric converter elements formed on a transparent substrate, each of the elements having a photoelectric converting layer and lower and upper electrodes located at lower and upper sides of the layer, and a method of fabricating the sensor. The sensor is preferably used for facsimiles, image scanners, and so on.
2. Description of the Related Art
Image sensors are incorporated into various image sensing devices or apparatuses (e.g., facsimiles and image scanners) to detect or sense the light reflected by the surface of an object to be sensed such as a paper document. Image sensors of this type sense the image on an object linearly and thus, they have a typical structure that photodiodes serving as photoelectric converter elements and Thin-Film Transistors (TFTs) serving as switching elements are arranged along a straight line. An example of the typical structure is shown in
FIGS. 1
to
4
.
As shown in
FIG. 1
, a prior-art image sensor
100
comprises a signal line
110
extending along a specified direction (which is defined as the X direction here), photodiodes
112
arranged at regular intervals along the line
110
in the X direction, TFTs
113
arranged at regular intervals along the line
110
in the X direction. The line
110
, the photodiodes
112
and the TFTs
113
are formed on a transparent substrate
101
.
One end of the signal line
110
extends in a direction perpendicular to the X direction (which is defined as the Y direction here) to be connected to a pad
120
for connecting electrically the line
110
to an external circuit or device. The pad
120
is approximately square.
Each of the photodiodes
112
is formed in their pixel area
121
with an approximately square shape. As explained later, the pixel areas
121
are defined by a patterned amorphous silicon (a-Si) layer that forms the photodiodes
112
. Each of the TFTs
113
is located near the corresponding photodiode
112
.
Each of the pixel areas
121
, an adjoining, corresponding one of the photodiodes
112
, and an adjoining, corresponding one of the TFTs
113
form the pixel of the sensor
100
. Thus, it is said that the sensor
100
comprises the pixels aligned regularly in the X direction. Since all the pixels have the same structure, the structure of one pixel is explained below for simplification.
FIGS. 2
to
4
are cross-sectional views along the lines II—II, III—III, and IV—IV in
FIG. 1
, respectively, which show the detailed pixel structure of the prior-art sensor
100
.
As shown in
FIG. 4
, a patterned semiconductor layer
130
is formed on the upper surface of the transparent substrate
101
. The layer
130
is approximately rectangular in plan shape. The layer
130
is selectively doped with impurity, forming a pair of source/drain regions
131
a
and
131
b
of the TFT
113
. The undoped part of the layer
130
between the source/drain regions
131
a
and
131
b
forms a channel region
132
. An electrically conductive channel of the TFT
113
is generated in the region
132
on operation.
A dielectric layer
102
is formed to cover the whole surface of the substrate
101
. The layer
102
covers the semiconductor layer
130
also. The part of the layer
102
located on the channel region
132
serves as the gate dielectric of the TFT
113
.
A gate electrode
133
is formed on the part of the dielectric layer
102
serving as the gate dielectric. The electrode
133
is located just over the channel region
132
.
A first interlayer dielectric layer
104
is formed on the dielectric layer
102
to cover entirely the same. The layer
104
covers the gate electrode
133
as well.
As shown in
FIG. 2
, the lower electrode
105
of the photodiode is formed on the first interlayer dielectric layer
104
. The electrode
105
, which has an approximately square plan shape, includes a connection part
105
a
that is used for electrical connection to the source/drain region
131
b
. The connection part
105
a
is formed to be approximately rectangular and to extend to the region
131
b
.
An amorphous silicon (a-Si) layer
106
with an approximately square plan shape is formed on the lower electrode
105
of the photodiode
112
. This a-Si layer
106
defines the pixel area
121
of the sensor
100
.
A transparent, upper electrode of the photodiode
112
, which has an approximately square plan shape, is formed on the a-Si first interlayer dielectric layer
104
to cover entirely the underlying a-Si layer
106
. The upper electrode
107
includes a connection part
107
a
that is used for electrical connection to the signal line
110
. The connection part
107
a
is formed to be approximately rectangular. The part
107
a
extends to be overlapped with the line
110
.
As shown in
FIGS. 2 and 3
, a patterned barrier metal layer
108
is formed on the connection part
107
a
of the upper electrode
107
. The layer
108
serves to prevent the substance contained in the signal line
110
from diffusing into the upper electrode
107
.
A second interlayer dielectric layer
109
is formed on the first interlayer dielectric layer
104
, covering the lower electrode
105
, the upper electrode
107
, and the barrier metal layer
108
.
As shown in
FIGS. 2
to
4
, the signal line
110
and two wiring lines
134
and
135
are formed on the second interlayer dielectric layer
109
. The signal line
110
overlaps with the underlying connection part
107
a
of the upper electrode
107
and the underlying barrier metal layer
108
. The line
110
is contacted with the layer
108
and electrically connected to the same (and the electrode
107
) by way of contact holes
118
of the dielectric layer
109
.
One end of the wiring line
134
is contacted with the underling connection part
105
a
of the lower electrode
105
of the photodiode
112
and electrically connected to the same by way of contact holes
136
of the second interlayer dielectric layer
109
. The other end of the line
134
is contacted with the underling source/drain region
131
b
and electrically connected to the same by way of contact holes
137
that penetrate the underlying dielectric layer
102
and the first and second interlayer dielectric layers
104
and
109
. Thus, the wiring line
134
interconnects the lower electrodes
105
with the source/drain region
131
b
of the TFT
113
.
One end of the line
135
is contacted with the underling source/drain region
131
a
and electrically connected to the same by way of contact holes
138
that penetrate the underlying dielectric layer
102
and the first and second interlayer dielectric layers
104
and
109
.
The combination of the pair of source/rain regions
131
a
and
131
b
, the channel region
132
, the dielectric layer
102
, and the gate electrode
133
constitutes the TFT
113
. The combination of the lower electrode
105
, the a-Si layer
106
and the upper electrode
107
constitute the photodiode
112
and its capacitor (not shown) for storing the electrical charge to be generated in the photodiode
112
.
Next, the operation of the prior-art image sensor
100
is explained below.
When incident light enters the photodiodes
112
, electrical charges are generated in the photodiodes
112
and stored temporarily in their capacitors. The charges thus stored in the capacitors are sequentially read out and outputted as electrical signals by sequentially driving the TFTs
113
serving as the switching elements. The driving operation of the TFTs
113
are typically carried out at a rate of several hundreds kilohertz (kHz) or several hundreds megahertz (MHz).
The prior-art image sensor
100
is fabricated in the following way.
First, a polysilicon layer (not shown) is formed on the upper surface of the transparent substrate
101
. The substrate
101
is made of transparent glass for incident light, for example. The polysilicon layer is patterned to have a predetermined shape, forming the pa

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