Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
2011-03-08
2011-03-08
Tran, Sinh (Department: 2622)
Television
Camera, system and detail
Solid-state image sensor
C348S294000, C250S208100
Reexamination Certificate
active
07903159
ABSTRACT:
A solid state imager converts analog pixel values to digital form on an arrayed per-column basis. A counter is coupled to an N-bit DAC to produce an analog ramp that varies corresponding to the contents of the counter. A ripple counter is associated with each respective column. A clock or a source of counts at a predetermined sequence supplies clock signals or counts to the counter elements. Column comparators gate the counter elements when the analog ramp equals the pixel value. The counter contents feed a video output bus to produce the digital video signal. Additional black-level readout counters elements can create and store a black level digital value that is subtracted from the pixel value to reduce fixed pattern noise. The counters may employ two's complement arithmetic. An additional array of buffer counter/latches can be employed. Ripple counters can be configured as counters to capture the digital video level, and then as shift registers to clock out the video levels to an output bus. The clock pulses or counts for the DAC counter and for the ripple counters can be at the same or different rates.
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Joyner Michael E.
Karia Ketan V.
Poonnen Thomas
Zarnowski Jeffrey J.
Lam Hung H
Molldrem, Jr. Bernhard P.
Panavision Imaging LLC
Tran Sinh
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