Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1997-12-22
2001-09-18
Garber, Wendy R. (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S296000, C348S314000, C348S322000, C348S363000
Reexamination Certificate
active
06292220
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image sensing apparatus, and more particularly to an image sensing apparatus having an image sensing device including a photoelectric conversion device section, vertical shift registers, and a horizontal shift register.
2. Related Art Statement
Various types of image sensing apparatuses converting subject images optically formed into electric signals have been proposed. These types of image sensing apparatuses each have, for example, an image sensing device including a photoelectric conversion device section, vertical shift registers, and a horizontal shift register. Then, using this image sensing device, the image sensing apparatus converts the above-mentioned optical subject image into an electric signal.
Although many types of these image sensing devices are known, for example, the construction of a vertical overflow drain type CCD will be described with reference to a block diagram of an embodiment according to the present invention that is shown in FIG.
1
. In addition, here, an interline transfer type CCD will be described.
This CCD comprises: photodiodes
1
that are arranged two-dimensionally in a horizontal direction and a vertical direction and store electric charges by receiving light; vertical shift registers
2
that receive the electric charges stored in these diodes
1
through transfer gates not shown and thereafter transfer them in a vertical direction in order; a horizontal shift register
3
that sequentially transfers in a horizontal direction the electric charges transferred from these vertical shift registers
2
; and a signal detector
4
that amplifies and outputs an output signal from the horizontal shift register
3
.
FIG. 2
also relates to an embodiment of the present invention, and a block diagram showing the construction of an image sensing apparatus having a CCD like the CCD shown in FIG.
1
. The construction of the image sensing apparatus will be described with reference to FIG.
2
.
This image sensing apparatus comprises:
a lens
11
forming a subject light beam on a light receiving plane of a CCD
13
described later; a light shading element
12
composed of, for example, a mechanical shutter controlling whether the element permits the subject light beam from this lens
11
to pass or not; a CCD
13
converting into an electric signal the subject light beam passed through the light shading element
12
; a signal processing circuit
14
outputting as a video signal
15
the electric signal from this CCD
13
after performing various processing on the signal; a driver
16
controlling the light shading element
12
; a signal generator
17
supplying pulses for controlling a signal charge storage period in the photodiodes
1
of the CCD
13
, pulses for driving the vertical shift registers
2
, pulses for the horizontal shift register
3
, and pulses for driving the signal processing circuit
14
so as to synchronize it with the CCD
13
; and a CPU
18
totally controlling each of the circuits including the driver
16
and the signal generator
17
. In addition, the signal processing circuit
14
and the signal generator
17
are built in a digital signal processor (called a DSP in figures)
19
.
Next, each signal at the time of driving an image sensing apparatus, having the construction as described above, with related art is expressed in a timing chart shown in FIG.
10
.
FIG. 10
shows a vertical sync signal VD, transfer gate pulses TG, sub-pulses SUB, vertical shift register transfer pulses VT
1
, VT
2
, VT
3
, and VT
4
, clamp pulses CLP, a light shading element, and a CCD signal.
The vertical sync signal VD is composed of a pulse train (here, defined as a frame) defining predetermined unit periods for each obtaining a signal expressing an image, and respective periods defined by respective pulses are called V
1
, V
2
, V
3
, V
4
, V
5
, V
6
, V
7
, V
8
, and so on.
The transfer gate pulses TG are the pulses determining the timing when electric charges stored in the photodiodes
1
are transferred to the vertical shift registers
2
. Further, respective pulses referred to as TG
0
, TG
1
, TG
2
, TG
3
, TG
4
, TG
5
, TG
6
, and TG
7
are outputted synchronously with respective pulses defining the periods V
1
, V
2
, V
3
, V
4
, V
5
, V
6
, V
7
, and V
8
.
The sub-pulses SUB, in this vertical overflow drain type CCD, are the pulses for vertically discharging the electric charges generated in the photodiodes
1
. The electric charges are discharged while the sub-pulses are outputted, and the electric charges are stored in the photodiodes
1
when the pulses are stopped during the time intervals tb
1
, tb
2
, tb
3
, tb
4
, tb
5
, tb
6
, and tb
7
. Furthermore, by controlling this charge storage time, a so-called device shutter controlling effective exposure time is achieved. Still further, the charge storage time in the photodiodes
1
is determined on the basis of the result obtained by performing photometry of a subject image with photometry means not shown. This charge storage time is controlled by these sub-pulses which further fragment the one frame period.
The vertical shift register transfer pulses VT
1
, VT
2
, VT
3
, and VT
4
are the pulses for driving the vertical shift registers
2
and thereby sequentially transferring the electric charges to the horizontal shift register
3
.
The clamp pulses CLP are the pulses for clamping an optical black portion of an output signal from the CCD
13
, which stabilize the potential level of a video signal and keep a black level stable.
The light shading element
12
normally open and, after electric charges are stored in the photodiodes
1
by a record trigger, the element
12
shades light when the electric charges are transferred.
The output signal from the CCD
13
is composed of optical black portions in the vertical direction as shown in time intervals to
1
and to
2
, and effective periods each of which is the period of the subject image sandwiched by the optical black portions. Further, usually, the signal level in the effective period is higher than the signal levels in the optical black portions.
Conventionally, when image-sensing is actually performed, vertical shift register transfer pulses VT
1
, VT
2
, VT
3
, and VT
4
are outputted in succession if a record trigger is issued, for example, by pressing an image-sensing button and the like in the period V
3
. Owing to the transfer pulses, unnecessary electric charges in the vertical shift registers
2
are discharged at high speed as shown in a time interval ta.
After that, in a period V
4
, electric charges are stored in the photodiodes
1
on the basis of a predetermined exposure period included in a time interval tb
4
of the sub-pulses SUB, that is, this time interval tb
4
becomes an exposure period of one frame of image.
The image exposed in this manner in the time interval tb
4
within the period V
4
is outputted in a period V
5
as a signal CS
4
. This signal CS
4
is a CCD signal that is outputted from the signal detector
4
as the result of exposure caused by the record trigger.
In the period V
5
when this signal of the CCD
13
is read, the light shading element
12
is closed after the time interval of closing operation, tm so that light may not reach the CCD
13
. Then, this light shading element
12
is opened by the driver
16
driving the light shading element again in and after the start of subsequent period V
6
.
The image received by the CCD
13
during the period V
5
when this light shading element
12
is closed is outputted in the period V
6
as a signal CS
5
. Since this signal CS
5
is a CCD signal in the period when the light is shaded by the light shading element
12
, the signal levels in the optical black portions are approximately equal to the level in the effective period.
In this manner, related art means for driving a CCD discharges at high speed the electric charges in the vertical shift registers
2
in the period V
3
when the record trigger is outputted. Then, the means stores the electric charges in the
Kijima Takayuki
Ogawa Yoshitaka
Garber Wendy R.
Olympus Optical Co,. Ltd.
Volpe and Koenig P.C.
Vu Ngoc-Yen
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