Image scaling circuit and method thereof

Computer graphics processing and selective visual display system – Computer graphics processing – Graphic manipulation

Reexamination Certificate

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Details

C345S619000, C345S667000, C345S560000

Reexamination Certificate

active

07667718

ABSTRACT:
An image scaling circuit and a method for scaling an image into images with different ratios are provided. The image scaling circuit includes a line buffer memory apparatus, a line buffer control apparatus, a first and a second scaling circuit. The first scaling circuit is coupled to the line buffer memory apparatus, and performs a first image scaling interpolation operation on the data output by the line buffer memory apparatus. The second scaling circuit is coupled to the line buffer memory apparatus, and performs a second image scaling interpolation operation on the data output by the line buffer memory apparatus. The line buffer control apparatus is coupled to the line buffer memory apparatus, the first scaling circuit and the second scaling circuit, for controlling the line buffer memory apparatus to receive or output a scan line data according to the operation status of the first and second scaling circuits.

REFERENCES:
patent: 5452235 (1995-09-01), Isani
patent: 6525742 (2003-02-01), Nonomura et al.
patent: 6661427 (2003-12-01), MacInnis et al.
patent: 2004/0012614 (2004-01-01), Shim et al.
patent: 2004/0056874 (2004-03-01), MacInnis et al.

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