Computer graphics processing and selective visual display system – Display peripheral interface input device – Light pen for fluid matrix display panel
Reexamination Certificate
1993-10-01
2001-03-27
Luu, Matthew (Department: 2672)
Computer graphics processing and selective visual display system
Display peripheral interface input device
Light pen for fluid matrix display panel
C345S182000
Reexamination Certificate
active
06208325
ABSTRACT:
TECHNICAL FIELD
This invention relates to video display controller systems and devices, particularly to the simultaneous control of both CRT and flat panel displays (so-called “dual display”). More particularly, the invention relates to a video display controller which may selectively rotate an image on one display while maintaining the same image on another display in non-rotated form.
BACKGROUND ART
VGA CRT controllers usually provide a number of analog signals such as Red, Green, Blue, Horizontal Sync, and Vertical Sync to drive a CRT display. Flat panel display controllers usually provide digital signals to drive a flat panel display. A flat panel display interprets the digital signals in order to properly display an image. The type of digital signal generated by a flat panel display controller generally varies depending upon the type, model, and manufacturer of a flat panel display. Examples of types of flat panel displays are Electroluminescent (EL), Active and Passive Liquid Crystal Displays (LCD), Vacuum Fluorescent, Plasma, and Electrochromatic.
Flat panel displays may have various pixel formats. One common pixel format for a flat panel display matches a VGA CRT display having 640 columns of pixels horizontally and 480 rows of pixels vertically. Each pixel may consist of various number of subpixels. For example, each pixel of a color flat panel display may comprise red, green, and blue subpixels. Flat panel display resolution (pixel density) and the number of subpixels per pixel may vary.
The digital signal provided by a flat panel display controller may vary depending upon how a pixel may be defined and generated on a specified type of flat panel display. For example, in a monochrome (e.g., black and white) display a pixel may be a single element which turns light or dark (e.g., ON or OFF). Thus a single bit could represent a pixel element turned ON or OFF.
FIG. 4A
illustrates a single pixel which may be utilized in a black and white display.
In color and grayscale displays, a pixel may be made up of a number of subpixels as illustrated in FIG.
4
B.
FIG. 4B
shows a color pixel in a flat panel display made of three color subpixels, one each of red, green, and blue. Each color subpixel may be represented by one bit of digital data such that a one would turn on the subpixel and a zero would turn off the subpixel. In this manner a three color pixel may be represented by three bits of data, one bit for each sub-pixel. The various states of the subpixels (ON or OFF) may generate up to 2
3
or 8 colors. For example, in
FIG. 4B
, an orange pixel color may be generated by simultaneously turning on the red and green subpixels.
To achieve a greater number of colors, more bits may be used to represent a pixel on a flat panel display. Referring to
FIG. 4C
, six bits per pixel (i.e., six subpixels per pixel) may be used to generate a total of 2
6
or 64 colors.
FIG. 4D
illustrates an embodiment where nine bits per pixel (i.e., nine subpixels per pixel) may be used to generate 2
9
or 512 colors. Grayscale shading may also be accomplished electronically using so-called “dithering” techniques, varying the number of times a pixel may be ON or OFF over a given number of frames and pixel locations. To provide these shading effects in a monochrome display, using one subpixel per pixel, extra bits may be used. For example, two bits per pixel may be used to create 2
2
or four grayscale shades, four bits may be used to create, 2
4
or sixteen shades of grayscale, six bits for 2
6
or 64 shades and so on. The dithering technique selectively switches ON or OFF a pixel over a number of frames. For example, in four bit grayscale, a pixel may be selectively turned ON or OFF over sixteen frames of image data. Due to the persistence of vision phenomenon, the eye interprets this selective switching as different shades of grey.
Color shading may also be accomplished using dithering techniques by varying the number of times a color subpixel may be turned ON or OFF during a varying number of frames. For example, 4 bit color shading may use 4 bits for each color subpixel red, green, and blue, for a total of twelve bits generating 2
12
or 4096 colors. Thus, over sixteen frames, each color may be turned ON or OFF to acquire a desired intensity or shade of color. The element of time may be used to create the appearance of color shades to the human eye.
Other types of flat panel displays may generate more than two native shades per subpixel using a technique known as “panel grey scaling”. These flat panel displays internally generate various shades for a subpixel which are native to the panel and do not use the electronic dithering techniques described above. Panel grey scaling uses multiple bits per subpixel to generate the various intensity levels used. For example, a three bit monochrome pixel may have three bits per subpixel (one subpixel per pixel) for a monochrome panel, providing 2
3
or eight native grey scales. Similarly, a nine bit color pixel may have three bits per subpixel for a color flat panel display, generating 2
9
or 512 native scales or shades of colors.
In Panel grey scaling all of the data bits, representing a shade or intensity of a pixel are directly provided to flat panel display. Thus, for panel grey scaling, more bits per pixel are processed by the video display controller, stored into video memory, and scanned out to the panel than in electronic grey scaling. For example, in electronic grey scaling, only one bit per subpixel may be used to perform electronic grey scaling or color shading. Panel grey scaling uses three or more bits per subpixel to directly generate color or monochrome grey scales on a panel.
Flat panel displays, such as the passive super-twist-nematic LCD, may be scanned in two different ways. Single scan flat panel displays are made of one panel utilizing one set of column drivers and one set of row drivers. One disadvantage of the single scan flat panel display may be the large resistance of the column wire stretching from top to bottom of flat panel display which may cause ghosting effects and slow response time. Dual scan flat panel displays reduce column resistance and improve response time. The dual scan flat panel display may be functionally equivalent to two single scan flat panel displays joined together creating one larger flat panel display. The separate panels may be referred to as the upper and lower panel half. Upper and lower panel halves have separate column and row drivers. Because the upper and lower panel halves have smaller heights, the column resistance for each half may be less, reducing ghosting effects and increasing response time.
A dual scan flat panel display uses a different scanning procedure than a single scan flat panel display. For example, in a dual scan flat panel display having a resolution of 640 columns×480 rows of pixels, the rows of pixels may be numbered from 0 to 479 from top to bottom, while the columns of pixels may be numbered from 0 to 639 from left to right. In order to reduce flicker, a dual scan flat panel display may begin scanning the upper and lower halves of the panel simultaneously from rows
0
and
240
, at the top-left and middle-left corners. Scanning starts on row
0
and row
240
simultaneously followed by row
1
and
241
and so on until the last lines
239
and
639
are scanned.
A buffer memory may be used to store data from a portion of the previous CRT frame in order to display it on flat panel display. The buffer memory may be referred to as a frame buffer and may be usually a type of high speed high bandwidth video memory such as SRAM or DRAM. The panel frame buffer may share with the video memory a portion of buffer memory allocated to graphics for the CRT. A frame buffer may be sized differently to accommodate various panel types as well as a desired control mechanism.
Flat panel display controller circuits may convert binary information from the CPU into one of multiple formats of digital information for a particular flat panel display. The controller may be configured to pr
Dharmarajan Krishnan C.
Reddy Dayakar C.
Reddy Modugu V.
Cirrus Logic Inc.
Luu Matthew
Rutkowski Peter
Stewart David L.
Violette J. P.
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