Image reproduction interface

Details Image reproduction interface Image reproduction interface

1983-10-28

1986-08-05

Brigance, Gerald L.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

340798, 340799, G09G 124

Patent

active

046046151

ABSTRACT:
An image reproduction interface disposed between a CPU, and a display device for reproducing an image based on code signals from the CPU corresponding to multiple image elements. The interface comprises a random-access memory for temporarily storing the code signals, and a multiplexor for selecting, for a first period, an address bus for the CPU to address the memory for storing therein the code signals, and for a second period, a refresh address bus for a controller of the display device to address the memory for reading out therefrom the code signals to reproduce the image. A sum of said first and second periods is equal to an interval at which the image elements are reproduced, whereby both storage and retrieval of the code signals into and from the memory may be effected within each reproduction interval in a time-sharing manner, thus reducing an idle or waiting time of the CPU and increasing a rate of updating the image on the display device.

REFERENCES:
patent: 4379293 (1983-04-01), Boisvert et al.
patent: 4388621 (1983-06-01), Komatsu et al.
patent: 4482979 (1984-11-01), May
patent: 4485378 (1984-11-01), Matsui et al.
patent: 4511965 (1985-04-01), Najaram

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