Image-rejection mixers having high linearity and high gain...

Telecommunications – Receiver or analog modulated signal frequency converter – Noise or interference elimination

Reexamination Certificate

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C455S313000, C455S323000, C327S113000

Reexamination Certificate

active

07424281

ABSTRACT:
An integrated semiconductor image-rejection mixer having high linearity and high gain. In addition to the components of a classic image-rejection architecture, the present mixer has a high-frequency current-diverting stage that permits the operation of the output stage with high conversion gain and sufficient headroom for good linearity, even in cases where the supply voltage is relatively low (such as 3 V). The conversion gain of the mixer and its image-rejection performance can be changed by changing the load resistances and the elements of the output polyphase network, with minor effects on linearity and no change in power consumption or DC levels. The power consumption of the image-rejection mixer is low because no additional DC current is required for buffers or amplifier stages. A direct upconversion double quadrature mixer stacked with an RF VGA and load tank using an R-C, R-6C single pole current mode signal path I/Q combiner and employing a common stage as both the IQ combiner termination and the VGA control point is also disclosed.

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Sansen, Willy M.C. et al., “An Integrated Wide-Band Variable-Gain Amplifier with Maximum Dynamic Range”, IEEE Journal of Solid-State Circuits, Aug. 1974, pp. 159-166, vol. SC-9, No. 4.
Behbahani, Farbod et al., “CMOS Mixers and Polyphase Filters for Large Image Rejection”, IEEE Journal of Solid-State Circuits, Jun. 2001, pp. 873-887, vol. 36, No. 6.

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