Boots – shoes – and leggings
Patent
1987-09-03
1989-07-04
Zache, Raulfe B.
Boots, shoes, and leggings
382 41, G06F 1520, G06K 936
Patent
active
048456632
ABSTRACT:
A digital image processing system has a pipeline bus for transferring addresses and data in parallel among the components of the system, which include an image memory, an address generator and an intensity processor. The pipeline bus includes a pipeline address bus, a pipeline data bus, and a master timing bus. Through the use of handshake signals, the pipeline bus permits a free flow of pipelined data among the components at whatever rate is necessary to complete the particular processing task. Image data is transferred in the form of N.times.N pixel subimage blocks which can be addressed using a single address.
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Brown Dwight E.
Lang Thomas A.
Laughery Mark S.
Bauer William D.
Kirn Walter N.
Minnesota Mining and Manufacturing Company
Sell Donald M.
Zache Raulfe B.
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