Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
2011-08-30
2011-08-30
Aggarwal, Yogesh K (Department: 2800)
Television
Camera, system and detail
Solid-state image sensor
C348S298000, C348S312000, C348S314000, C348S308000
Reexamination Certificate
active
08009212
ABSTRACT:
Circuitry for reducing fixed pattern noise in an image processing system with a 4-T (4 transistors) pixel and a method thereof is proposed. The image processing system includes two voltage sources, two current sources, a 4-T pixel, a second portion of a linearized source follower, a ping pong memory, a PGA, and auto-zero circuitry. By coupling the auto-zero circuitry to the PGA, an open loop is formed to clamp the output of an op amp of the PGA to a stable reference when resetting the PGA so as to remove DC offsets at the output terminal of the op amp.
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Hsiao-Hui Tong, “Design of A Fixed Pattern Noise Reduction Circuit for CMOS Image Sensor Array”, 2002, p. 1-6.
Chang Chiao-Fu
Lee Yuan-Che
Sze Jhy-Jyi
Aggarwal Yogesh K
Hsu Winston
Margo Scott
United Microelectronics Corp.
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