Photocopying – Projection printing and copying cameras – Identifying – composing – or selecting
Reexamination Certificate
1999-09-01
2001-03-20
Adams, Russell (Department: 2851)
Photocopying
Projection printing and copying cameras
Identifying, composing, or selecting
C347S249000, C358S442000, C358S483000, C358S468000
Reexamination Certificate
active
06204910
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to an image processing system, and more particularly to an image processing system including an image processing apparatus and method, which can process, at a high speed and in a simple, reliable and accurate manner, image data supplied in the form of an image signal from a scanner that uses, for example, a charge-coupled device (CCD) as a photoelectric element.
In an image processing apparatus such as an electronic copy machine, a digital copy machine (PPC), a facsimile, etc., it is common knowledge that a charge-coupled device (CCD), for example, is used as a photoelectric element which is provided in a scanner section for reading an image.
Concerning the control of the CCD, in general, the higher the reading speed, the higher the frequency used for forwarding pixels, and the more difficult it is to handle the signals of the CCD.
In light of this, in the conventional medium-speed digital PPC, pixels in the image area of the CCD are divided into an odd group and an even group, thereby performing high-speed processing.
Since, however, the driving speed of a CCD designed for the conventional medium-speed digital PPC, i.e. the transfer rate of pixel signals, is not so high, not so strict timing signal generation accuracy is demanded of the drive pulse generating means for generating drive pulses to be supplied to the CCD, amplifiers (Amp) and analog/digital converters (ADCs) included in a preprocessing system, i.e. to be supplied to a CCD/preprocessing-large-scale-integrated-circuit (LSI) drive block provided in an application specific integrated circuit (ASIC) for scanning.
Since there is enough time in the control of a CCD designed for the medium-speed digital PPC, the timing relationship between drive pulses which satisfies the demanded specifications of the CCD and the LSI (Amp, ADC) for preprocessing can be obtained, using no setting means for timing adjustment but substantially fixed values.
Also, in the control of a CCD designed for the medium-speed digital PPC, not so high A/D conversion speed is required when the pixel signal (analog signal) of the CCD sampled and amplified by the Amp is A/D converted by the ADC into an 8-bit digital signal (image data), which is input to the scanner ASIC and subjected to data processing such as shading correction.
Accordingly, even when in the control of the CCD of the medium-speed digital PPC, image data output from the ADC in synchronism with its A/D conversion clock signal is input to the scanner ASIC, it can be latched by the scanner ASIC, without any problem, using a clock signal employed therein.
However, where the preprocessing system is constructed using a 4-channel output CCD designed for a high-speed digital PPC, in order to enhance the speed of the scanner, the driving speed of the CCD, i.e. the transfer rate of a pixel signal, is rather high, and therefore very strict timing signal generation accuracy is demanded of the drive pulse generating means for generating drive pulses to be supplied to the CCD and the amplifiers (Amp) incorporated in the preprocessing system, i.e., against the CCD/preprocessing-LSI drive block in the scanner ASIC.
In other words, in the control of the CCD designed for the high-speed digital PPC, it is necessary to create and keep, within a very short period in time, the timing relationship between the drive pulses which satisfies the demanded specifications of the CCD and the preprocessing LSI (Amp, ADC).
To this end, setting means for timing adjustment is also necessary in the control of the CCD designed for the high-speed digital PPC.
Further, in the control of the CCD designed for the high-speed digital PPC, high A/D conversion speed is required when the pixel signal (analog signal) of the CCD sampled and amplified by the Amp is A/D converted by the ADC into an 8-bit digital signal (indicative of image data), which is input to the scanner ASIC and subjected to data processing such as shading correction.
Accordingly, in the control of the CCD designed for the high-speed digital PPC, the scanner ASIC needs input means for reliably latching image data output from the ADC in synchronism with an A/D conversion clock signal.
In other words, even if the conventional image processing system performs control using a 4-channel output CCD designed for the high-speed digital PPC, it cannot perform high speed control since it is intended for the 2-channel output CCD designed for the medium-speed digital PPC.
BRIEF SUMMARY OF THE INVENTION
The present invention has been developed in light of the above, and is aimed at providing an image processing system including an image processing apparatus and method, which can process, at a high speed and in a simple, reliable and accurate manner, image data supplied in the form of an image signal from a scanner that uses, for example, a charge-coupled device (CCD) as a photoelectric element.
According to an aspect of the invention, there is provided an image processing apparatus for processing an image signal obtained by subjecting optical image information to photoelectric conversion, comprising:
an image fetch circuit for converting the image signal into a digital signal and outputting it as input image data of one line;
an image data processing circuit for fetching the input image data of one line from the image fetch circuit in units of one pixel, and subjecting it to predetermined image processing;
a drive circuit for at least supplying the image fetch circuit with a predetermined drive pulse signal which enables a high-speed operation of the image fetch circuit; and
a timing setting circuit for programming, from the outside, timing of the drive pulse signal supplied from the drive circuit.
According to another aspect of the invention, there is provided an image processing apparatus comprising:
an accumulating section for accumulating, in elements of one line, electric signals obtained by subjecting optical image information to photoelectric conversion;
an image reading section for reading, in a plurality of predetermined directions, the electric signals accumulated in the elements of one line by the accumulating section, thereby synthesizing the electric signals, converting the synthesized electric signal into a digital signal on the basis of a pulse signal for digital conversion, and outputting the digital signal as input image data of one line;
an image data processing section for fetching, in units of one pixel, the input image data of one line output from the image reading section, thereby performing predetermined image data processing on the basis of a master clock signal; and
a drive section for supplying the digital conversion pulse signal to be used in the image reading section, and the master clock signal to be used in the image data processing section, such that the digital conversion pulse signal can be used in place of the master clock signal, or vice versa.
According to a yet further aspect of the invention, there is provided an image processing method comprising the steps of:
converting optical image information into electric signals and accumulating the electric signals in elements of one line;
supplying a digital conversion pulse signal and a master clock signal such that the digital conversion pulse signal can be used in place of the master clock signal, or vice versa;
programming timing of the digital conversion pulse signal;
reading the electric signals from the elements of one line in a plurality of predetermined directions, thereby synthesizing the electric signals, converting the synthesized electric signal into a digital signal on the basis of the digital conversion pulse signal, and outputting the digital signal as input image data of one line;
generating an input data latching clock signal on the basis of the master clock signal;
programming timing of the input data latching clock signal from the outside;
fetching, in units of one pixel, the input image data of one line on the basis of the input data latching clock signal, and performing predetermined image data processing on the basis of
Adams Russell
Brown Khaled
Foley & Lardner
Toshiba Tec Kabushiki Kaisha
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