Image processing load balancing for a host processor with a conn

Details Image processing load balancing for a host processor with a conn Image processing load balancing for a host processor with a conn

1994-05-04

1996-08-27

Powell, Mark R.

395112, 395114, G06K 1500

Patent

active

055509541

ABSTRACT:
Apparatus for processing and displaying binary pixel image data includes a printer for receiving image data and for presenting the image data as bilevel pixel values. The printer includes a processor for altering the received image data into an output image. A host processor stores multi-bit-per-pixel image data and further includes image processing software and data transmission circuitry coupled to the printer. The host processor compares the bilevel pixel data size and the multi-bit-per-pixel data size and, based upon a size relationship determined from the comparison, processes the multi-bit-per-pixel image data into bilevel pixel values in either the printer or the host processor so as to transmit the least amount of image data between the host processor and the bilevel printer.

REFERENCES:
patent: 4905097 (1990-02-01), Watanabe et al.
patent: 4922349 (1990-05-01), Abe et al.
patent: 4992955 (1991-02-01), Yabuuchi et al.
patent: 5270805 (1993-12-01), Abe et al.
patent: 5283664 (1994-02-01), Fujisawa et al.
patent: 5363454 (1994-11-01), Udagawa et al.
patent: 5438648 (1995-08-01), Takaoka et al.

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