Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
2001-12-11
2004-09-28
Philippe, Gims (Department: 2613)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C345S504000, C345S519000, C345S520000, C386S349000, C386S349000
Reexamination Certificate
active
06798839
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of the priority from the prior Japanese Application No. 2000-377839, filed Dec. 12, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image processing device for decoding digitally coded image data, and a television receiver and an image (picture) reproducing device which use the image processing device. More specifically, the present invention relates to a device for decoding image data, such as MPEG-based data, to which the decode time stamps are appended.
2. Description of the Related Art
A technique which uses the decode time stamp in decoding coded data, such as MPEG data, is disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication No. 8-116532. This technique is intended to facilitate the decode operation control by writing the decode time stamp (hereinafter referred to as DTS) into a buffer together with coded image data and utilizing the DTS read from the buffer in starting frame-by-frame decoding.
That is, before starting decoding, the DTS appended to the beginning of a frame is compared with the count in a system time clock (STC) counter in the decoding device. When a match occurs, the corresponding image data is read from the buffer and then decoded.
However, errors may occur in coded data input to the decoding device when they are received through broadcasting or played back from a recording medium. In such case, the decoding device may fail to perform the decoding operation properly or the start of decoding may be delayed.
Once the start of decoding is delayed, the restoration to the proper decoding operation becomes difficult because the DTS and the counter in the STC counter do not match. The delay of the start of decoding may cause the buffer to overflow.
In Jpn. Pat. Appln. KOKAI Publication No. 11-225332 is disclosed a technique which involves attaching identification information (hereinafter referred to as ID) to each frame of image data, creating a table in which IDs are mapped to DTSs, image data storage locations in the buffer, and coding types, and managing the image data decoding operation using that table. According to this technique, the STC is produced based on the program clock reference value (hereinafter referred to as PCR) and the resulting STC is compared with the DTS to determine the ID of a frame to be decoded. A frame of image data the ID of which corresponds to the DTS that matches the STC is read from the buffer and then decoded.
The image decoding method and the decoding device disclosed in the above Patent Publication will described below with reference to
FIGS. 1
,
2
, and
3
.
FIG. 1
is a block diagram of the image data decoding device for decoding coded image data (for example, MPEG-2 transport stream) using PCR and DTS.
A coded bit stream with temporal information, such as an MPEG-2 transport stream (TS), is input to a demultiplexer (DMUX)/PCR extractor (hereinafter abbreviated as the PCR extractor)
11
, where the PCR value required to produce the reference time (STC) is extracted from the bit stream. The extracted PCR is sent to an STC counter
12
, where a comparison is made between the STC (count) and the PCR. When there is a difference between them, the STC is reset to the PCR; namely, the STC is revised to the reference time on the encoder side.
Also, in the PCR extractor
11
a coded bit stream with DTSs, such as an MPEG-2 packetized elementary stream (hereinafter referred to as PES), is separated from the input data and then sent to a DTS extractor
13
. The DTS is extracted in the DTS extractor
13
and then applied to an ID/DTS/storage location holding circuit
14
.
The data input to the DTS extractor
13
is sent to an ID adder
15
, where the header information of each frame of image data is detected and identification information (ID) is produced for each frame on the basis of its header information. A picture type (coding type for the corresponding frame) is sent from the ID adder
15
to the ID/DTS/storage location holding circuit
14
together with the corresponding ID.
The data input to the ID adder
15
are written into an input buffer
16
in sequence. The storage location information (an address in the buffer) for each data written into the input buffer
16
is presented from the input buffer
16
to the ID/DTS/storage location holding circuit
14
.
Here, the data input to the ID adder
15
may be a coded bit stream with temporal information, such as PES. However, since the temporal information needs to be removed in a decoder to be described, it is desirable that the input data be coded image data without temporal information (i.e., elementary stream: ES).
In the ID/DTS/storage location holding circuit
14
is created and stored a table in which the DTS extracted from each frame of input data by the DTS extractor
13
, the storage location in the buffer
16
in which the corresponding input data has been stored, and the ID produced for the corresponding input data in the ID adder
15
are mapped (ID/DTS/storage location mapping table).
In a comparator
17
, the STC from the STC counter
12
is compared with DTSs in the table in the ID/DTS/storage location holding circuit
14
to determine the presence or absence of a frame for which decoding is to begin. In the presence of such a frame, its ID is sent to a decoding controller
18
.
The storage location information corresponding to the ID from the comparator
17
is read from the ID/DTS/storage location holding circuit
14
into the decoding controller
18
, which in turn provides the storage location and decoding area of data to be decoded and an instruction to start decoding to the decoder
19
. The decoder can decode any rectangular image area.
The decoding controller
18
makes reference to the state of the decoder
19
to determine a reproduction mode, such as normal, skip, or repeat. The normal reproduction mode is one in which each frame of image data is reproduced in succession. The skip reproduction mode is one in which frames are reproduced with some of them skipped. The repeat reproduction mode is one in which the same frame is reproduced repeatedly. In the decoder
19
, data read from the specified storage location in the buffer is decoded.
In MPEG-2, there are three image compression schemes. The first scheme utilizes spatial correlation for coding (compression). In a natural image, since the values of neighboring pixels are close to each other (interpixel correlation is high), the spatial correlation in the image is utilized for coding (compression). The second scheme utilizes interframe (temporal) correlation in an image sequence. In this scheme, compression is performed by storing image information from the previous frame and representing the current frame by the difference from the previous frame. The third scheme utilizes nonuniform probabilities of occurrence of symbols in coding (compression) by the first and second schemes.
Of image data decoded by the decoder
19
, frame data coded utilizing spatial correlation are written into a decode memory
20
as they are. As for frame data coded utilizing temporal correlation, data in the process of being decoded is processed using previously decoded image data from the decode memory
20
and the resultant decoded data is written into the decode memory. After decoded data have been written into the decode memory
20
, the decoder
19
notifies the decoding controller
18
of the termination of decoding and the location at which readout was terminated.
To decode multi-channel image data, the same table as described previously is created for each channel in the ID/DTS/storage location holding circuit
14
. In this case, using the readout termination location information from the decoder
19
the decoding controller
18
allows the decoder to decode image data on different channels on a time-sharing basis. Decoded image data for each frame is sent to a display processor.
The operation of the ima
Iwata Haruya
Kai Naoyuki
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Parsons Charles
Philippe Gims
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