Facsimile and static presentation processing – Static presentation processing – Memory
Reexamination Certificate
1999-11-22
2002-09-24
Evans, Arthur G. (Department: 2722)
Facsimile and static presentation processing
Static presentation processing
Memory
Reexamination Certificate
active
06456390
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image processing device and an image processing method that convert input image information into intermediate code image data by band and execute rendering processing (conversion into bit map data) by supplying the converted intermediate code image data to a rendering mechanism, and a recording medium for the same.
2. Description of the Related Art
In a conventional image processing device, which does not have a memory sufficient for expanding the data for one page of an output image into the bit map data, divides the one page into multiple bands, and possesses multiple buffers (hereafter, referred to as “band buffer”)equivalent to the size of each band, it is required that input image information is temporarily converted into the format of the intermediate code image data.
As the intermediate code image data, when viewed from a band-divided original image (band image), there are one based on the run-length format of low abstraction and another one called as the display list of high abstraction, which is described by the plotting command format. In generating the intermediate code image data, except for a case that the input image information is generated in view of the band width in advance, since the generation of the intermediate code image data is sequentially conducted by band corresponding to the plotting position of the input image information, it is impossible to reserve areas (hereinafter, referred to as “intermediate code image data holding blocks”)for retaining the intermediate code image data collectively by band.
As a conventional technique for effectively holding the intermediate code image data, in the Japanese Published Unexamined Patent Application No. Hei 3-114856 (hereunder referred to as the first published application) is disclosed a system furnished with two band buffers. In this system, as the intermediate code image data is generated by band, first the intermediate code image data is stored in the basic block of the minimum capacity; and if the image data exceeds the capacity of the basic block, an extended block capable of holding some capacity of data is reserved to hold the intermediate code image data, and an intermediate code image data control table is provided which associates the block being used with the band.
Incidentally, as the input image information for one page is completed to be converted into the intermediate code image data, a rendering mechanism starts interpreting sequentially by band the intermediate code image data in the intermediate code image data holding blocks controlled by band, the data thus interpreted is written in the band buffers as the bit map data, and at the moment when the whole processing of the intermediate code image data in that band is completed, the bit map data is transferred to an output device.
If a runaway type printer (a printer which, once an output instruction is given, cannot stop its output on the way such as a laser printer) is used in this case, it will be necessary to expand the intermediate code image data into raster data in real time and supply the raster-expanded data to the printer. Here, if a speed by which the bit map data is generated in each band buffer is not faster than the printing speed of the printer, there will occur an overrun error (void resulting from failure in printing of the image by the concerned bit map data). Hence, before starting the rendering mechanism, a check is made by each band as to whether or not the speed of generating the bit map data in the band buffers exceeds the printing speed.
A hardware rendering mechanism is an implementation used in maintaining the rendering speed always faster than the printing speed, without deteriorating the picture quality of an output image. In the use of this hardware rendering mechanism, it is necessary to effectively supply the hardware rendering mechanism with the intermediate code image data holding blocks which are controlled by band and stored to be distributed on the memory.
A DMA (Direct Memory Access) transfer is a method that effectively supplies the hardware rendering mechanism with the intermediate code image data holding blocks, and a chained DMA control system makes it possible to transfer data areas distributed on the memory by starting the DMA once. The information that controls the DMA controller in that case is retained by a descriptor including at least information regarding a source transfer address and a transfer data quantity. As a conventional technique of the chained DMA control system, in the Japanese Published Unexamined Patent Application No. Hei 9-319698 (hereunder, referred to as the second published application) has been disclosed a technique regarding the DMA transfer system, in which the descriptor and the transfer data are retained in a continuous region on a memory in a system furnished with a PCI (Peripheral Communication Interconnect) bus.
In the first published application, however, it has been necessary to reserve the basic block of the minimum capacity on the memory and the extended block of a larger capacity than the basic block, in order to store the intermediate code image data. And, when the quantity of the intermediate code image data is equal to (the above minimum capacity +&agr;), for example, the efficiency of the memory in use has been low. Further, there has not been disclosed any countermeasure in case the intermediate code image data cannot still be retained because of a larger quantity of the intermediate code image data, even though the extended block is reserved. Furthermore, there has not been any reference as to the mechanism that effectively supplies the rendering unit with the intermediate code image data and generates the bit map data in the band buffers.
Next, when the intermediate code image data is intended to be supplied to the rendering mechanism by means of the chained DMA transfer disclosed in the second published application, it has been necessary, after determining the transfer data, to reserve a fresh area for the descriptor on the memory and set the management information therein. Furthermore, it requires a stock register (a register for holding the descriptor looked ahead), and has a system restriction that necessarily contains the PCI bus.
SUMMARY OF THE INVENTION
The present invention has been made in view of such problems which the conventional technique holds, and provides an image processing device and an image processing method that supply the intermediate code image data generated by band to a hardware rendering mechanism at high speed and enhance the efficiency of the memory in use, and a recording medium for the same.
The image processing device of the present invention has a generation part that interprets the contents of code image data and generates multiple pieces of intermediate code image data for bands formed by dividing a page, a storage part that stores the multiple pieces of the intermediate code image data generated by the generation part, a relation part that relates each of the storage locations of the multiple pieces of intermediate code image data in the storage part with specific orders, a transfer part that refers to the storage locations related by the relation part, reads the multiple pieces of intermediate code image data sequentially from the storage part, and transfers them, and a plotting part that receives the multiple pieces of the intermediate code image data transferred from the transfer part, interprets their contents to execute plotting of images, and stores image data of the plotted images in a buffer memory.
In the image processing device, the relation part may relate each piece of the intermediate code image data to each band, and may relate any pieces of the intermediate code image data with each other in the bands.
The image processing device may further have a part that attaches management information including information about its own data quantity to each piece of the intermediate code image data, and the relation part may h
Konno Kazuhito
Okubo Hiroshi
Evans Arthur G.
Fuji 'Xerox Co., Ltd.
Morgan & Lewis & Bockius, LLP
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