Image processing circuit with reduced number of contact pads

Details Image processing circuit with reduced number of contact pads Image processing circuit with reduced number of contact pads

1991-04-02

1992-11-10

Moore, David K.

Image analysis

Histogram processing

For setting a threshold

382 41, 382 49, 36472412, 36472801, 358 37, 358166, G06K 956, G06K 936, G06F 1531, G06F 15336

Patent

active

051631008

ABSTRACT:
An integrated circuit for the processing of digitized signals which are representative of a source image which is defined by image elements which are encoded on M bits and which are arranged in I rows and J columns. The image is processed by means of M sliding windows (W.sub.1 to W.sub.M) which consist of N rows and P columns and which step-wise slide past each image element along I rows, but which have been shifted through one row with respect to one another. Processing is performed by bit serial operators which successively act on the bits of each of the N+N-1 image elements. The signals may be serially applied via Q contact pads, where Q=N+M-1, or in parallel via Q contact pads where Q is the first multiple of M which is equal to or larger than N+M-1, the integrated circuit then also comprising a parallel to serial converter circuit.

REFERENCES:
patent: 4363104 (1982-12-01), Nussmeier
patent: 4380046 (1983-04-01), Fung
patent: 4550437 (1985-10-01), Kobayashi et al.
patent: 4791677 (1988-12-01), Mori et al.
patent: 4833635 (1989-05-01), McCanny et al.
patent: 4864629 (1989-09-01), Deering
patent: 4939575 (1990-07-01), Childers
T. Fukushima, "Image Signal Processor Computes Fast Enough for Gray-Scale Video" Electronic Design, vol. 32, Oct. 4, 1984, pp. 209-215.
R. Gnanasekaran, "On a Bit-Serial Input and Bit-Serial Output Multiplier", IEEE Transaction on Computers, vol. C-32, No. 9, Sep. 1983, pp. 878-880.

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