Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1991-10-25
1994-05-31
Brinnich, Stephen
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358429, H04N 712
Patent
active
053174178
ABSTRACT:
An image reducing apparatus includes a black-pixel counting section for counting a number of black pixels in an N.times.M-pixel area in an original image represented by white and black levels, where N and M denote predetermined integers equal to or greater than 2; a pattern comparing section for comparing a pixel pattern in the N.times.M-pixel area and an area surrounding the N.times.M-pixel area with predetermined reference patterns; and a level determining section for determining a level of a pixel in a reduction-resultant image in accordance with the black-pixel number counted by the black-pixel counting section and with a result of the pattern comparison by the pattern comparing section, the reduction-resultant image pixel corresponding to the N.times.M-pixel area in the original image.
REFERENCES:
patent: 4124870 (1978-11-01), Schatz et al.
patent: 4266249 (1981-05-01), Chai et al.
patent: 4811239 (1989-03-01), Tsao
patent: 4931881 (1990-06-01), Matsui et al.
Hanaoka Hideyuki
Yamamura Katsumi
Brinnich Stephen
Matsushita Graphic Communication Systems Inc.
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