Image processing apparatus having plural image processors...

Television – Camera – system and detail – Combined image signal generator and general image signal...

Reexamination Certificate

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Details

C231S004000, C231S004000

Reexamination Certificate

active

06437825

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an image signal processing apparatus, such as a scanner for inputting image signals.
In the prior art, image signal processing is carried out in such a way that an image signal inputted using a photoelectric conversion element, for example, a CCD (charge coupled device) or a contact type image sensor, is converted into a signal capable of storage, transmission or the like. An example of this signal processing is described as follows, where various functional parts in the prior art relating to the image signal processing are considered.
(1) Regarding shading correction, a problem exists in the prior art in that an image signal inputted using a photoelectric conversion element, such as a CCD (charge coupled device) or a contact type image sensor, includes distortion components, such as unevenness of illumination or characteristic dispersion of each photoelectric conversion element. Consequently, shading correction is carried out in order that this distortion is corrected and a uniform image signal is reproduced.
(2) Also regarding MTF correction, in order that the MTF characteristic possessed by an optical system or a sensor will be corrected and a further edge characteristic (undulled characteristic of edge shape of wave form) will be improved, MTF correction processing is carried out.
(3) Further regarding a pseudo-half-tone section, in order that a half-tone image obtained in a printer of black-and-white recording will be reproduced as a dummy, a signal processing method called error diffusion is carried out.
In addition to those processes described above, in usual apparatuses, &ggr;-processing for carrying out level conversion of an input signal, binarization for outputting a document image signal, signal processing for separating a half-tone image area of a photograph or the like and a black-and-white binary image area of a document image or the like, and other various processings have been proposed.
For example, in the prior art, respective means for realizing signal processing and memories for storing data are constituted individually. In such a constitution, however, there are problems in that, since a plurality of memory interfaces are required in the apparatus as a whole and the circuit scale is increased and the apparatus is operated only by an independent function in each memory, a mutual function between memories cannot be achieved, and further an unused portion is produced in the memory, and so the apparatus constitution becomes disadvantageous.
That is, an apparatus in the prior art, as shown in
FIG. 1
, is constituted by a signal processing section I comprising a sensor
1
, an A/D converter
2
, a shading corrector
3
, a &ggr;-corrector
4
, an MTF corrector
5
, a binarization circuit
6
, an error diffusion circuit
7
, a signal output circuit
8
and its output
9
, and structures entirely separated from the signal processing section I (so-called “external structures”) where a first memory section II, a second memory section III, a third memory section IV and the like (comprising a memory
10
, a memory
11
, a memory
12
and the like) are separated from each other.
Respective memory sections are constituted by memories
10
-
12
, each comprising N bit/pixel; in this case, assuming that N=8, the memories each comprise 8 bit/pixel, and such case is effective since standard memories can be utilized.
In the constitution shown in
FIG. 1
, however, since three structures each comprising 8 bits are installed separately from the signal processing section I and are independent of each other, individual memory interfaces are required as above described, and further problems concerning an increase in the required number of parts, an increase of trouble in the treatment due to complication of the wiring connecting respective parts, a decrease in the reliability and life due to the complexity of each circuit and the large number of parts, the large scale of the apparatus, and an increase in the price and degradation of the reliability cannot be avoided.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an image signal processing apparatus to realize a signal processing system and apparatus, where, for example, parts comprising sensor
1
to signal output circuit
8
and a line memory are constituted as one body, as shown in FIG.
2
and
FIG. 3
, so as to obtain an image signal inputted using a photoelectric conversion element such as a CCD or a contact type image sensor in circuit of small scale with a high picture quality.
In order to solve the above-mentioned problems, the data width of a signal referred to in a shading corrector, an MTF corrector and an error diffusion circuit is set as b+f+j≦8 per one pixel, respectively.
Or the error component commonly possessed by plural pixels (N pixels) in the error diffusion circuit is set to b+f+j′≦8, the data width per one pixel being made j′=j/N.
Image signal processing is realized in the above-mentioned constitution, whereby the data width of a signal referred to in respective signal processings is reduced, and an image signal satisfying the accuracy of signal processing sufficiently and having a high picture quality can be obtained. For example, when a circuit is constituted by an LSI, the memory section can be easily mounted on the same LSI.
The apparatus has the effect that a memory required in the image signal processing can be made 8 bits per one pixel and a cheap memory constitution can be utilized.


REFERENCES:
patent: 4953013 (1990-08-01), Tsuji et al.
patent: 5122833 (1992-06-01), Sato
patent: 5130822 (1992-07-01), Nagata et al.
patent: 5210600 (1993-05-01), Hirata
patent: 5212767 (1993-05-01), Higashino et al.
patent: 5237401 (1993-08-01), Koike et al.
patent: 5262873 (1993-11-01), Ishizuka
patent: 5289294 (1994-02-01), Fujisawa
patent: 5317421 (1994-05-01), Ito
patent: 5555095 (1996-09-01), Inuzuka et al.
patent: 5812274 (1998-09-01), Inuzuka et al.

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