Image processing apparatus

Details Image processing apparatus Image processing apparatus

2005-07-05

2008-10-07

Wu, Jingge (Department: 2624)

Image analysis

Image compression or coding

Adaptive coding

C382S250000, C375S240000

Reexamination Certificate

active

07433528

ABSTRACT:
In an image processing apparatus that performs image processing including a plurality of steps that do not need to be executed simultaneously, processing circuits used in steps that do not need to be executed simultaneously are reconfigured in time division using dynamically reconfigurable circuits, implementing a plurality of circuits without increasing the number of gates as well as achieving fast processing speed because processing is by hardware.

REFERENCES:
patent: 5841381 (1998-11-01), Nakayama
patent: 2000-102005 (2000-04-01), None
Ramachandran, S. et al., “A Dynamically Reconfigurable Video Compression Scheme Using FPGAs with Coarse-grain Parallelism,” 2002, VLSI Design, vol. 15, pp. 521-528.

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