Image memory data processing control apparatus

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Details

364521, 340728, 340747, 340750, G06F 314

Patent

active

050364758

ABSTRACT:
An image memory data processing control apparatus having an image memory unit divided into a plurality of block memories, for each of which each pixel register and each timing control means are disposed, whereby a high-speed data drawing may be made. When executing a bitblt processing, writing decoders and reading decoders select modules associated with the pixel registers concerned. Data are read out from the image memory unit and data obtained by a raster operation are written into the image memory unit.

REFERENCES:
patent: 4295135 (1981-10-01), Sukonick
patent: 4719585 (1988-01-01), Cline et al.
patent: 4755810 (1988-07-01), Knierim
patent: 4766431 (1988-08-01), Kobayashi et al.

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