Image memory controller for controlling multiple memories and me

Details Image memory controller for controlling multiple memories and me Image memory controller for controlling multiple memories and me

1989-09-28

1993-08-31

Dixon, Joseph L.

Boots, shoes, and leggings

395164, 395166, 395400, 395725, 364DIG1, 364243, 3642436, 3642451, 3642467, G06F 1204

Patent

active

052416429

ABSTRACT:
There is disclosed a memory controller for controlling addresses to a plurality of different memory types while treating the memory system as a whole so as to create a unified addressing arrangement. The controller is structured to allow for a reprogramming of the split address between the memories and for maintaining contiguously addressed locations. A register is used to hold the split address and the register can be updated at initialization to vary the split depending upon physical memory changes. The controller also maintains a common bit length addressing word regardless of the memory size being addressed by the system processor.

REFERENCES:
patent: 4376972 (1983-03-01), Johnson et al.
patent: 4571676 (1986-02-01), Mantellina et al.
patent: 4679167 (1987-07-01), Finnell
patent: 4829420 (1989-05-01), Stahle
patent: 4908789 (1990-03-01), Blokkum et al.
patent: 4980850 (1990-12-01), Morgan
patent: 4985871 (1991-01-01), Catlin

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