Image memory controller

Details Image memory controller Image memory controller

1991-06-11

1993-01-12

Harkcom, Gary V.

Boots, shoes, and leggings

395101, 395115, 364DIG1, 3642629, 3642633, G06F 1540

Patent

active

051796350

ABSTRACT:
An image memory controller having a first address signal generation means for generating a first address signal in response to a state signal representing the operational state of a printer. The first address signal corresponds to a location in an image memory. A second address signal generation means generates a second address signal for refreshing the image memory and a third address signal generation means generates a third address signal used for rewriting at least part of data stored in the image memory. An address signal selection means selectively delivers any of the first, second, and third address signals to the image memory.

REFERENCES:
patent: 4470129 (1984-09-01), Disbrow et al.
patent: 4646259 (1987-02-01), Lincoln et al.
patent: 4712185 (1987-12-01), Aoki
patent: 4712929 (1987-12-01), Kitaoka
patent: 4736330 (1988-04-01), Capowski
patent: 4742344 (1988-05-01), Nakagawa et al.
patent: 4763241 (1988-08-01), Egawa et al.
patent: 4774528 (1988-09-01), Kato
"LSI Handbook", Pub. by Ohm-sha, Nov. 30, 1984, pp. 554-556.

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