Registers – Coded record sensors – Particular sensor structure
Reexamination Certificate
2002-07-23
2004-08-31
Frech, Karl D. (Department: 2876)
Registers
Coded record sensors
Particular sensor structure
C235S454000, C235S462290, C235S462410, C348S241000, C348S222100, C348S230100
Reexamination Certificate
active
06783073
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an image input system for optically inputting an image by using a solid state image pickup device of an X-Y address system using MOS transistors, a solid state image pickup device of a charge transfer system using a CCD (Charge Coupled Device), or the like for photoelectric conversion and charging. More particularly, the invention relates to a technique of lessening an influence of noise components of a signal outputted from a solid state image pickup device, which is exerted on a process of a correlated double sampling method at a post stage or the like and relates to, for example, a technique which is effective when applied to a video camera, a digital still camera or the like.
BACKGROUND ART
A CCD can convert an optical image formed according to the intensity of irradiated light into a charge signal according to the intensity of the light and can move the charge signal by sequentially applying pulses to a number of transfer gates so as to sequentially move the charge signal through the wells of a potential formed on the surface of a semiconductor substrate The charge signal (carrier) can be moved by, for example, controlling a number of transfer gates (insulating gates) arranged in parallel in the CCD by pulse signals of two phases which are opposite to each other An example of an outputting unit for outputting the transferred charge signal is a circuit called a GCD (Gated Charge Detector). An outputting unit of the GCD type has a floating capacitive element precharged by a precharge MOS transistor every cycle of the charge transfer by the pulse signals. A change in the potential of the floating capacitive element due to a flow of a charge signal from the CCD to the precharged floating capacitive element is detected by a source follower output circuit. When the gate capacitance of an input MOS transistor of the source follower output circuit is C
3
and the capacitance of the floating capacitive element is C
0
, an output voltage of the source follower output circuit is generally reduced only by Qs/(C
3
+C
0
) (where Qs is a negative charge).
An outputting operation by the outputting unit is performed in: a period of reset by the precharged MOS transistor (period in which the final transfer gate of the solid state image pickup device is in an OFF state and precharging is performed by turning on the precharge MOS transistor); a feedthrough period (period in which the final transfer gate of the solid state image pickup device and the precharge MOS transistor are turned off and the precharged charges are re-distributed to the floating capacitor and the input gate capacitor of the source follower input MOS transistor for stabilization); and a charge signal output period (period in which the precharge MOS transistor is in an off state and the charge signal is outputted from the final transfer gate of the solid state image pickup device to the floating capacitive element).
The charge signal outputted from the outputting unit includes capacitive noises such as 1/f noise which occurs in the source follower input MOS transistor and reset noise which occurs when the floating capacitive element or the like is reset every transfer cycle. Since the capacitive noises occur at low frequencies, in order to reduce the noises, a preprocessor for amplifying an output signal of the solid state image pickup device by a correlated double sampling method can be adopted. A correlated double sampling amplifier to which the correlated double sampling method is applied generates a signal corresponding to a difference voltage between the output signal level (black level) in the feedthrough period and the output signal level in the charge signal output period.
Further, a feedback clamping circuit is disposed at a post stage of the correlated double sampling amplifier. The feedback clamping circuit samples a difference voltage between the signal level (black level) in the feedthrough period and the signal level in the signal charge output period (this signal level is particularly called a reference signal level in a state where a photoreceiver of the solid state image pickup device is optically interrupted) in a state where the photoreceiver of the solid state image pickup device is optically interrupted. The feedback clamping circuit adds a feedback voltage to an output voltage of the correlated double sampling amplifier so that the sampled difference voltage becomes constant. Consequently, a video signal using the black level and the difference voltage as references is generated by the preprocessor during a predetermined charge transfer period (video period) in the horizontal scan period and the video signal is supplied to a signal processor at some later stage.
The inventors of the present invention have examined the solid state image pickup device and the preprocessor as described above and clarified the following. Due to parasitic capacitance between the gate and source of the precharge MOS transistor and parasitic capacitance (output node parasitic capacitance) between the final transfer gate of the solid state image pickup device and the output node, when the outputting operation of the outputting unit shifts from the feedthrough period to the charge signal output period, a change in a pulse signal for controlling the charge transfer causes an undesirable change in the level of the output node via the output node parasite capacitance. The amount of the undesirable level change is determined mainly by the ratio between the output node parasite capacitance and the floating capacitance. The inventors have found that since the capacitance of the floating capacitive element tends to be reduced in order to increase the detection sensitivity of the outputting unit, the output node parasite capacitance relatively increases and it causes an increase in the undesirable level change in the charge signal output period. The undesirable level change due to the capacitive noise causes an undesirable offset voltage which is outputted from the source follower output circuit in the charge signal output period.
The inventors have found that when the offset voltage increases, the amount of the feedback control performed by the feedback clamping circuit increases and it is feared that the circuit operation cannot follow it. When the feedback control cannot follow, the reference of the video signal changes at random on the horizontal scan unit basis and it causes unevenness in an input image. When the conductance of transistors constructing the feedback clamping circuit is increased in order to deal with the problem, it brings about an increase in a chip occupying area and power consumption. Especially, under the circumstances that the operation source voltage is decreased to realize low power consumption, the necessary feedback control amount cannot be satisfied. The following problem has been also made clear by the inventors. When the preprocessor including the correlated double sampling amplifier and the feedback clamping circuit is provided as a preprocessing LSI formed as a semiconductor integrated circuit, the preprocessing LSI cannot be generally used for a solid state image pickup device having a relatively large capacitive noise component.
It is an object of the invention to provide an image input system capable of inputting an image with high quality even if the capacitive noise characteristic of a solid state image pickup device used is not good.
Another object of the invention is to provide an image input system capable of preventing a situation such that a feedback clamping control cannot follow by an influence of an offset voltage included in an output signal of a solid state image pickup device.
The above and other objects and novel features of the present invention will become apparent from the following description and the accompanying drawings.
DISCLOSURE OF INVENTION
An image input system according to the invention comprises a solid state image pickup device and a preprocessor for performing correlated double sampling amplification on an output
Kasahara Masumi
Nakajima Hiroki
Yahagi Kouichi
Frech Karl D.
Mattingly Stanger & Malur, P.C.
Renesas Technology Corp.
Walsh Daniel I
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