Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Patent
1997-03-10
1999-11-23
Hjerpe, Richard A.
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
345 89, G09G 336
Patent
active
059908556
ABSTRACT:
There is provided an image information process apparatus to be applied to a display for displaying bit image display data for each pixel, for enabling the display to display continuous tones in an error diffusion manner based on P bit image data, P being larger than L. This apparatus includes a plurality of adding circuits to which a plurality of P bit image data are concurrently supplied. A predetermined lower bit of an added result at respective adding circuits is used as error data supplied to the next adjacent adding circuit. An error data holding circuit holds a predetermined lower bit of an output from an adding circuit corresponding to the last column pixel in image data supplied. It then supplies the lower bit held to an adding circuit corresponding to the top front column pixel of the image data supplied. With this arrangement, a display which is capable of displaying images based on digital data of a limited number of bits displays in a pseudo manner continuous tones expressed using a higher number of bits than the limited number. In addition, performance and processing speed of image information processing are improved.
REFERENCES:
patent: 4897734 (1990-01-01), Sato et al.
patent: 4908614 (1990-03-01), Yamagishi
patent: 5596349 (1997-01-01), Kobayashi et al.
patent: 5638188 (1997-06-01), Moro et al.
patent: 5673120 (1997-09-01), Fujii
Kitagawa Makoto
Kobayashi Mitsugu
Uehara Hisao
Hjerpe Richard A.
Laneau Ronald
Sanyo Electric Co,. Ltd.
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