Incremental printing of symbolic information – Light or beam marking apparatus or processes – Scan of light
Reexamination Certificate
2000-01-14
2001-07-17
Le, N. (Department: 2861)
Incremental printing of symbolic information
Light or beam marking apparatus or processes
Scan of light
C347S235000, C347S247000
Reexamination Certificate
active
06262758
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image formation apparatus.
2. Related Background Art
The conventional LED head has the structure shown in
FIGS. 1A and 1B
. In this structure, plural chips, on which LED light emission elements are arranged in an array state in one column, are arranged in a column state and the chip can form an image for one line. Here, an LED array to be used has the structure where an anode or a cathode of the LED chip is composed of a common electrode and one side generally forms a pad which can be connected to a driver. In this conventional example, the description will be given for a case where the cathode is the common electrode.
Numeral
801
denotes one of the LED chips, on which plural LED light emission elements
803
are arranged. Numeral
804
denotes connection pads, which correspond to the LED's
803
, connected to driver units, which correspond to LED light emission elements of an LED chip driver
802
, by wire bonding. Of course, also at the LED chip driver
802
side, connection pads
805
at the driver side, which correspond to the connection pads at the LED chip side, are provided. In the case of this LED chip, one light emission control unit is necessary for one LED light emission unit. At the LED driver side, drive control units
806
equal to the number of the LED light emission units, which can be ON/OFF controlled by an image signal, are provided.
In the above-mentioned LED array, since the light emission units have to be one-to-one connected to the driver units by the wire bonding, there occurs a complication problem to realize high integration because the wire bonding becomes a hindrance as neck portions.
As a method for realizing the high integration of the LED array, there has been known a method of using a SLED (Self-Scanning Light Emitting Diode), in which a shifting function is given to the LED array chip. For example, the SLED is disclosed in Japanese Patent Application Laid-Open Nos. 1-238962, 2-208067, 2-212170, 4-5872, 4-23367, 4-296579, and 5-84971. Also, Proceedings of the 1990 IEICE (The Institute of Electronics, Information and Communication Engineers) Spring Conference (Mar. 5, 1990) “Self-Scanning Type Light Emission Element (SLED) Using PNPN Thyristor Structure”, and Japan Hard Copy 1991 “Light Emission Element Array for Optical Printer in Which Driving Circuits are Integrated” have been disclosed.
As described later, since the use of the SLED chip can extremely reduce the number of connections (wire bonding) between the light emission units and the driver units, it becomes easy to provide high integration without it being prevented because of the wire bonding neck.
As explained above, in the SLED, since light emission of the elements is successively performed in each of the chips, assuming that the number of light emission elements in one chip is defined as m, a maximum time given to perform the light emission for each light emission element becomes 1/m of the maximum time during a period of one main scanning.
However, in this manner, if a light emitting time of each light emission element is set at the maximum time, the structure of a circuit which generates a timing signal becomes more complex.
SUMMARY OF THE INVENTION
An object of the present invention is to solve the above-mentioned problem.
In order to achieve the above object, the present invention provides an image formation apparatus which records an image on a recording medium, comprising:
a recording element array head on which plural recording chips are arranged, plural recording elements being arrayed on each of the recording chips;
a reference clock generation means for generating a reference clock;
a main scan sync signal generation means for generating a main scan sync signal by dividing the reference clock into 2
n1
(n1: positive number) parts;
an input means for raster inputting image data for one line in synchronism with the main scan sync signal;
a drive clock generation means for generating a drive clock by dividing the reference clock into 2
n2
(n2: positive number) parts; and
a drive means for driving the recording chips in synchronism with the drive clock.
Another object, structure and effect of the present invention will become apparent from the following detailed description and the attached drawings.
REFERENCES:
patent: 5285247 (1994-02-01), Itoh
patent: 5550877 (1996-08-01), Waters
patent: 5832190 (1998-11-01), Terajima et al.
patent: 5847729 (1998-12-01), Takahashi et al.
patent: 6008833 (1999-12-01), Ohtsubo et al.
patent: 6024431 (2000-02-01), Takahashi et al.
patent: 6027200 (2000-02-01), Takahashi et al.
patent: 6031974 (2000-02-01), Takahashi et al.
patent: 6069644 (2000-05-01), Tanioka et al.
patent: 1-238962 (1989-09-01), None
patent: 2-208067 (1990-08-01), None
patent: 2-212170 (1990-08-01), None
patent: 4-5872 (1992-01-01), None
patent: 4-23367 (1992-01-01), None
patent: 4-296579 (1992-10-01), None
patent: 5-84971 (1993-04-01), None
Fukusaka Tetsuro
Kawase Michio
Ohtsubo Toshihiko
Suzuki Kazuyoshi
Watanabe Takahiro
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Le N.
Pham Hai C.
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