Image display apparatus having plurality of pixels arranged...

Details Image display apparatus having plurality of pixels arranged... Image display apparatus having plurality of pixels arranged...

2008-01-15

2008-01-15

Hjerpe, Richard (Department: 2629)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S084000, C345S087000, C345S098000, C345S690000

Reexamination Certificate

active

07319453

ABSTRACT:
In a partial display mode, a source IC outputs a start signal at an “H” level designating the start of vertical scanning by a vertical scanning circuit, over a plurality of cycles from before a time T1to after a time T8. A plurality of shift registers sequentially shift the start signal in synchronization with a clock signal to sequentially drive a plurality of activation enable signals, respectively, to an “H” level. Then, after time T8when first to fourth activation enable signals simultaneously attain an “H” level, the source IC outputs an enabling signal at an “H” level to the vertical scanning circuit. In response, the vertical scanning circuit simultaneously activates first to fourth gate lines corresponding to the first to the fourth activation enable signals, respectively.

REFERENCES:
patent: 6791539 (2004-09-01), Nakajima et al.
patent: 7079103 (2006-07-01), Morita
patent: 7133013 (2006-11-01), Kamezaki et al.
patent: 2001/0033278 (2001-10-01), Ohta et al.
patent: 1319830 (2001-10-01), None
patent: 2001-343928 (2001-12-01), None
patent: 2003-029715 (2003-01-01), None
Chinese Office Action, with English translation, issued in Chinese Patent Application No. CN 2004101021321, mailed Jun. 22, 2007.

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