Image defect correcting circuit for a solid state imager

Details Image defect correcting circuit for a solid state imager Image defect correcting circuit for a solid state imager

1991-01-29

1992-09-01

Britton, Howard W.

Facsimile and static presentation processing

Facsimile

Recording apparatus

35881315, 35821317, 358228, H04N 5335

Patent

active

051444461

ABSTRACT:
An image defect correcting circuit for a solid state imager arranged such that levels of output signals form respective pixels of a solid state image pickup element illuminated on its whole surface a light of uniform brightness are compared with a predetermined level, data indicative of a position of a pixel which outputs a signal of peculiar level is generated on the basis of a compared result, a video signal output from at least the pixel located at the position indicated by the position data is interpolated by using output signals of other pixels according to an interpolation processing and the output signals of the respective pixels and the video signal generated by the interpolation processing are selectively output on the basis of the position data.

REFERENCES:
patent: 4167754 (1979-09-01), Nagumo et al.
patent: 4237488 (1980-12-01), Takemura
patent: 4739495 (1988-04-01), Levine
patent: 4805023 (1989-02-01), Younse
patent: 4910598 (1990-03-01), Itakura

Affiliated with

Also associated with

Rating

Image defect correcting circuit for a solid state imager does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Image defect correcting circuit for a solid state imager, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Image defect correcting circuit for a solid state imager will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-772449