Image decoding with dedicated bidirectional picture storage and

Details Image decoding with dedicated bidirectional picture storage and Image decoding with dedicated bidirectional picture storage and

1995-10-26

1998-11-24

Tung, Bryan S.

Television

Bandwidth reduction system

Data rate reduction

382233, H04N 732

Patent

active

058414754

ABSTRACT:
Encoding data are given to a variable-length decoding circuit and are decoded, and are given to a memory so as to be stored therein. The same data are read out from the memory, whereby decoding processing of the encoding data is executed twice within one frame period. Decoding data due to the twice decoding processings are stored in the memory at an output part thereof. Data of odd fields are read out in display order in the first half of the display period of one frame. Data of even fields are read out in display order in the latter half of the display period of one frame. Thus, even in case where restored image data of a B-picture are outputted in interlacing, a memory capacity can be reduced.

REFERENCES:
patent: 5317397 (1994-05-01), Odaka et al.
patent: 5461420 (1995-10-01), Yonemitsu et al.
patent: 5539466 (1996-07-01), Igarashi et al.
P1394 Standard for a High Performance Serial Bus, IEEE Standards, P1394 Draft 8.0v4, Nov. 21, 1995, (Complete Copy with relevant pages circled in Table of Contents).
Kunzman et al., "1394 High Performance Serial Bus: The Digital Interface for ATV", Reprinted with Permission of the IEEE, presented at the International Conference on Consumer Electronics, Chicago, ILL. Jun. 1995.
Hoffman et al., "IEEE 1394: A Ubiquitous Bus", Presented at COMPCON Spring 1995, San Francisco, CA.

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