Image analysis – Image compression or coding – Shape – icon – or feature-based compression
Reexamination Certificate
2000-12-28
2004-01-27
Mehta, Bhavesh M. (Department: 2625)
Image analysis
Image compression or coding
Shape, icon, or feature-based compression
C382S247000, C382S246000, C382S233000, C382S165000, C345S630000, C375S240080
Reexamination Certificate
active
06683992
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an image decoding apparatus and an image coding apparatus and, more particularly, to those using hardware circuits which realize high-speed decoding and coding in object units.
BACKGROUND OF THE INVENTION
As the digitization of image data goes forward, apparatuses for compressive coding, transmission, and extensive decoding of image data have been put to practical use. The MPEG2, a global standard, is generally used as a compressive coding method, and various kinds of LSI apparatuses have been released as apparatuses performing coding or decoding adaptable to the MPEG2.
Hereinafter, an example of a conventional image decoding apparatus performing the MPEG2 decoding will be described with reference to the drawings (refer to “MPEG AV Decoder LSI for Digital Broadcasting”, Hirotoshi Uehara, Shoichi Goto, et al., Matsushita Technical Journal Vol. 45, No. 2, April 1999, pp. 17-24).
FIG. 9
is a block diagram illustrating the construction of a decoding LSI
800
which is a decoding apparatus adaptable to the MPEG2.
The decoding LSI
800
includes a setup processor
801
for controlling the respective components of the decoding LSI
800
; a stream IF
809
for receiving a bitstream obtained by subjecting digital image data to MPEG2 coding; a variable-length decoding engine
802
for subjecting the bitstream to variable-length decoding; and an IDCT engine
803
for subjecting frequency-domain image data obtained by the variable-length decoding to inverse discrete cosine transform (IDCT) to generate space-domain image data. The decoding LSI
800
generates reproduced image data on the basis of the space-domain image data and predictive image data.
The decoding LSI
800
further includes a motion compensation engine
804
for subjecting the reproduced image data to motion compensation to generate the above-mentioned predictive image data; a memory
806
for storing the bitstream, the space-domain image data, the predictive image data, and the reproduced image data; a memory controller
805
for controlling access to data stored in the memory
806
; a video IF
808
for outputting the reproduced image data to a display unit (not shown); and an I/O control processor
807
for controlling the video IF
808
on the basis of a control signal from the memory controller
805
.
The variable-length decoding engine
802
, the IDCT engine
803
, and the motion compensation engine
804
are respectively constituted by hardware circuits.
Next, the operation of the decoding LSI
800
will be described.
When a bitstream obtained by subjecting digital image data to MPEG
2
compressive coding is input to the stream IF
809
, the bitstream is stored in the memory
806
through the memory controller
805
.
In the setup processor
801
, the header of the bitstream stored in the memory
806
is detected, and decoding on this part is started. Although this decoding on the bitstream is performed according to the MPEG2 decoding procedure, the setup processor
801
basically performs decoding on the header and general control as a sequencer.
Decoding on the part following the header of the bitstream is sequentially performed by the variable-length decoding engine
802
, the IDCT engine
803
, and the motion compensation engine
804
. The result of the decoding, i.e., reproduced image data, is temporarily stored in the memory
806
.
The video IF
808
reads the already-decoded image data (reproduced image data) from the memory
806
according to a display time, under control of the I/O control processor
807
, and outputs it to the display unit.
The reason why variable-length decoding, IDCT, and motion compensation are performed by dedicated engines is because each of these processes is a fixed simple process with less branch-on condition and has considerable computational complexity.
Since the calculations with considerable arithmetic loads are performed by the dedicated engines and the respective engines are arranged so that the flow of data between these engines goes along the arithmetic processes in the decoding, a small-scale LSI capable of high-speed processing is realized.
Recently, the MPEG4 coding, which is suitable for low-bitrate transmission and is able to perform high-performance image processing, has been standardized.
The MPEG4 coding differs from the MPEG2 coding in that the conception of object coding is introduced in the MPEG4 coding. In the object coding, an image is divided into objects such as a foreground and a background, and compressive coding, data transmission, and extensive decoding are performed object by object, and decoded image data corresponding to the respective objects are composited for display. Data to be subjected to object coding are as follows: texture data indicating the luminance or chrominance of an image, corresponding to MPEG2 image data, and shape data indicating the shape of the image.
FIG. 10
is a diagram illustrating functional blocks for realizing an algorithm for decoding a bitstream which is obtained by compressively coding digital image data according to the MPEG4 coding.
In
FIG. 10
, reference numeral
900
denotes a decoding apparatus for decoding a bitstream including coded texture data and coded shape data. This decoding apparatus
900
includes a decoder
90
for decoding a bitstream corresponding to a foreground to output decoded texture data and decoded shape data; and a decoder
9
for decoding a bitstream corresponding to a background to output decoded texture data and decoded shape data. Further, reference numeral
92
denotes an image in a texture image space comprising the decoded texture data outputted from the decoder
90
, and
93
denotes an image in a shape image space comprising the decoded shape data outputted from the decoder
90
. Further, reference numeral
94
denotes an image in a texture image space comprising the decoded texture data outputted from the decoder
9
, and
95
denotes an image in a shape image space comprising the decoded shape data outputted from the decoder
9
.
The decoding apparatus
900
further includes a composition means
91
for generating composite image data corresponding to a composite image
96
which is obtained by superimposing the foreground on the background, on the basis of the decoded texture data and decoded shape data outputted from the respective decoders
90
and
9
.
The decoding unit
90
further includes a variable-length decoding means
901
for subjecting the bitstream corresponding to the foreground to variable-length decoding, and outputting compressed texture data, compressed motion vector information, and arithmetically-coded shape data; and a motion vector decoding means
904
from decoding the compressed motion vector information to output a motion vector.
Further, the decoder
90
includes an inverse quantization means
902
for subjecting the compressed texture data to inverse quantization; an inverse DCT means
903
for subjecting the inversely-quantized data to inverse DCT to output space-domain texture data; and an addition means
911
for adding the space-domain texture data and predictive texture data to output decoded texture data. Furthermore, the decoder
90
includes a padding means
906
for padding the decoded texture data; a memory
907
for storing the output from the padding means
906
; and a motion compensation means
905
for motion-compensating the padded texture data stored in the memory
907
on the basis of the motion vector to generate the above-mentioned predictive texture data.
Moreover, the decoder
90
includes a shape arithmetic decoding means
908
for subjecting the arithmetically-coded shape data to arithmetic decoding on the basis of predictive shape data to output decoded shape data; a memory
910
for storing the decoded shape data; and a motion compensation means
909
for motion-compensating the decoded shape data stored in the memory
910
on the basis of the motion vector to generate the above-mentioned predictive shape data.
The construction of the decoder
9
is identical to that of the dec
Takahashi Toshiya
Toida Hiroaki
Choobin Barry
Matsushita Electric - Industrial Co., Ltd.
Mehta Bhavesh M.
Wenderoth , Lind & Ponack, L.L.P.
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