Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
2005-03-01
2005-03-01
An, Shawn S. (Department: 2613)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C375S240160, C375S240170, C375S240150, C375S240140, C382S236000, C382S238000
Reexamination Certificate
active
06862318
ABSTRACT:
Introduced in an image data encoding device is a logic-memory combined chip in which a memory device and a signal processing device are combined. A logic part and a memory part can be connected to each other with a wide bus, allowing to improve processing capability of data transfer. However, the memory part of the logic-memory combined chip has a small capacity, so that an attempt to increase the capacity will lead to upsizing of the chip, resulting in an increase in costs. Therefore, in a processing that data transfer results in bottlenecks (i.e., motion search), image data is transferred to/from an internal memory capable of transferring data at high speed. In a processing that high-speed data transfer is not required, image data is transferred to/from an external memory.
REFERENCES:
patent: 5822770 (1998-10-01), Shim
patent: 5877813 (1999-03-01), Lee et al.
patent: 6600835 (2003-07-01), Ishikawa
Nikkei Electronics, no. 711, pp. 133-148, “MPEG 2 and Encoding LSI Change a Home”, Mar. 9, 1998 (with partial English translation).
Hanami Atsuo
Kumaki Satoshi
Matsumura Tetsuya
An Shawn S.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Renesas Technology Corp.
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