Computer graphics processing and selective visual display system – Computer graphics processing – Graph generating
Reexamination Certificate
1995-02-07
2003-06-10
Nguyen, Phu K. (Department: 2772)
Computer graphics processing and selective visual display system
Computer graphics processing
Graph generating
Reexamination Certificate
active
06577313
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a control apparatus for controlling image data such as a bit image.
2. Related Background Art
In a prior art text output apparatus such as a laser beam printer which develops text information such as code data sent from a host computer and changes it to a bit image stored in an internal random access memory and reads it out, the bit data to the random access memory (RAM) must be overwritten.
Namely, when a pattern shown in FIG.
5
(
a
) is to be outputted, a pattern shown in FIG.
5
(
b
) is first written into the RAM and then a pattern shown in FIG.
5
(
c
) is overwritten.
Since it is very difficult to determine whether the pattern to be written is to be simply written or to be overwritten, it is necessary to previously clear the RAM. Namely, after the pattern has been developed in the RAM, it is necessary to read it out and clear that portion of the RAM for which printing is completed.
Where a plurality of copies of one page are to be made, if the pattern is read out of the RAM and the portion of the RAM for which printing is completed is cleared, it is necessary for the host computer to send the same code data as many times as the number of copies and to develop the same bit image in the RAM the plurality of times.
If the text output apparatus operates at a low speed and a CPU (controller) processing speed is sufficiently high, the development of the same bit image on the RAM the plurality of times may be attained only by the operation of the CPU. However, in a high speed text output apparatus such as a laser beam printer, the CPU operation is not sufficient and a high speed sub-processor is usually used for parallel processing with the CPU. As a result, the processing apparatus is very expensive.
SUMMARY OF THE INVENTION
It is an object of the present invention to eliminate the above shortcoming.
It is another object of the present invention to provide an improved image data control apparatus.
It is another object of the present invention to provide a control apparatus which can process image data with a simple construction.
It is another object of the present invention to provide an image data control apparatus having a high image data processing efficiency.
It is another object of the present invention to provide an image data control apparatus which can process image data at a high speed.
It is another object of the present invention to provide an image data control apparatus which can simply process image data.
It is another object of the present invention to provide an inexpensive data control apparatus which can process data at a high speed without an expensive processor.
These and other objects, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments of the invention and the appended claims.
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Akimoto Koichiro
Honda Kazuyuki
Igarashi Masaru
Isaka Yukio
Okamoto Yoshifumi
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