Image analysis – Image compression or coding
Reexamination Certificate
1998-11-18
2001-07-17
Lee, Thomas D. (Department: 2722)
Image analysis
Image compression or coding
C358S426010, C358S438000, C348S420100
Reexamination Certificate
active
06263111
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image encoding and decoding apparatus for compressing and expanding image data and, more particularly, to an image data compression and expansion circuit for compressing and expanding encoded image data having a fixed data length.
The present invention also relates to an image encoding apparatus for compressing or expanding image data and, more particularly, to an image data compressing and expanding circuit for compressing and expanding encoded image data having a fixed data length.
The present invention further relates to an encoding method for compressing and expanding the data on a half tone image which is divided into blocks each having a small area.
2. Description of the Related Art
Methods of using input and output line buffers as a toggle have conventionally been proposed in order to increase the processing speed of the input and the output of image data. One such method is disclosed in Japanese Patent Laid-Open No. Sho 63-84270. The method disclosed in Japanese Patent Laid-Open No. Sho 63-84270 requires two line buffers
12
,
13
of the same size, as shown in
FIG. 20
, in order to realize a toggle line buffer. This method is advantageous in that it is possible to process image data consecutively by reading image data from one line buffer
12
while writing image data into the other line buffer
13
.
When image data is input or output from the line buffer
12
or
13
, it is necessary to switch the line buffers
12
and
13
from one to the other by a data selector
16
every time the data for one line is input or output.
In order to apply the system of the conventional image processing apparatus having the above-described structure to a block encoding system, it is necessary to process the data for one line in a block as a unit. It is therefore necessary to provide the same number of input and output line buffers as the number of lines constituting one block. That is, twice as many line buffers as the lines constituting one block are required, and the increase in the number of line buffers unfavorably raises the cost of the image processing apparatus.
In addition, when the image data are read out of the line buffer, it is necessary not only to switch the line buffers for data in different blocks but for data for different lines within one block. The time assigned to the switching of the line buffers for data for different lines within one block is, under the severest condition, not longer than the time for which the image data for one pixel is transferred.
Furthermore, according to this method, if the image data transferring speed is higher than the response speed (reading speed of the FIFO) of the selector of the line buffer, the switching operation between the line buffers cannot overtake the data transferring operation. As a result, the output data of the adjacent line buffers collide with each other, so that high-speed image data compression-expansion is impossible.
Methods of editing encoded image data have conventionally been proposed. One such method is disclosed in Japanese Patent Laid-Open No. Hei 3-110914.
FIG. 21
is a functional block diagram of the method disclosed in Japanese Patent Laid-Open No. Hei 3-110914. An image memory compresses the image data for one screen by a fixed length for each block, and the compressed image data are stored in the image memory consisting of one memory bank which is controlled by a one-system control signal. If the encoded data for one block is read and decoded as a unit, it is possible to edit the image data at the time of decoding.
In the conventional image data compressing method having the above-described structure, when the original image data are simultaneously encoded and decoded, access control is necessary for the operation of storing the encoded image data into the image memory and the operation of reading the encoded data from the image memory. It is therefore difficult to process the image data consecutively at a high speed, and the control method is complicated.
Methods of encoding image data which is divided into blocks each having a small area have conventionally been proposed. One such method is described in “Image Data Compressing Circuit for Hard Copy Apparatus” , D-254 in the proceedings of the autumn meeting of the Institute of Electronics, Information and Communication Engineers, 1990.
FIG. 22
shows the structure of the encoding circuit described in this literature. In
FIG. 22
, the reference numeral
101
represents an image buffer memory for converting the image data which are input with the data for one line as a unit into blocks of data (X
11
to X
44
), each block having 4×4 pixels,
102
a maximum and minimum representative tone level threshold value computing means for extracting the maximum tone level (L
max
) and the minimum tone level (L
min
) in the block and computing the threshold values (P
2
, P
1
) for obtaining the maximum•minimum representative tone levels,
103
a reference level•difference computing means for obtaining the maximum and minimum representative tone levels (Q
4
, Q
1
) on the basis of the image data of the block (X
11
to X
44
) and the threshold values (P
2
, P
1
) and further obtaining the reference level (LA) and the difference (LD),
104
a quantized threshold value computing means for computing the quantized threshold values (L
2
, L
1
) from the reference level (LA) and the difference (LD),
105
a resolution information computing means for quantizing the image data (X
11
to X
44
) on the basis of the quantized threshold values (L
2
, L
1
) and the reference level (LA) and obtaining resolution information (&phgr;
11
to &phgr;
44
), and
106
an encoded data buffer for storing the reference level (LA), the difference (LD) and the resolution information (&phgr;
11
to &phgr;
44
) and serially outputting them as encoded data.
The following formulas (1) to (9) show the encoding algorithm in the encoding circuit. The encoding method will now be explained with reference to these formulas and FIG.
22
.
Encoding
algorithm
:
P1
=
(
L
m
a
x
+
3
L
m
i
n
)
/
4
(
1
)
P2
=
(
3
L
m
a
x
+
L
m
i
n
)
/
4
(
2
)
Q1
=
Average
value
of
(
Xij
≤
P1
)
(
3
)
Q4
=
Average
value
of
(
Xij
>
P2
)
(
4
)
LA
=
(
Q1
+
Q4
)
/
2
(
5
)
LD
=
(
Q4
-
Q1
)
(
6
)
L1
=
LA
-
LD
/
4
(
7
)
L2
=
LA
+
LD
/
4
(
8
)
for
(
i
=
1
to
4
)
for
(
j
=
1
to
4
)
if
Xij
≤
L1
φ
ij
=
01
(
binary
)
else
if
Xij
≤
LA
φ
ij
=
00
(
binary
)
else
if
Xij
≤
L2
φ
ij
=
10
(
binary
)
else
φ
ij
=
11
(
binary
)
end_for
end_for
}
(
9
)
The maximum and minimum representative tone level threshold value computing means
102
first extracts the maximum tone level (L
max
) and the minimum tone level (L
min
) of the pixels Xij (i, j=1 to 4) in the block output from the image buffer memory
1
and computes the threshold values (P
2
, P
1
) in accordance with the formulas (1) and (2). Then the reference level•difference computing means
103
obtains the maximum and minimum representative tone levels (Q
4
, Q
1
) in accordance with the formulas (3) and (4), and computes the reference level (LA) and the difference (LD) in accorda
Furuta Hiroaki
Imanaka Yoshifumi
Kodama Yukio
Matoba Narihiro
Ohnishi Masaru
Lee Thomas D.
Mitsubishi Denki & Kabushiki Kaisha
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