Image analysis – Image compression or coding – Transform coding
Reexamination Certificate
2000-02-22
2003-09-30
Mehta, Bhavesh M. (Department: 2625)
Image analysis
Image compression or coding
Transform coding
C348S403100, C348S441000, C375S240180, C375S240200, C382S236000
Reexamination Certificate
active
06628839
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to an image coding system converting apparatus, an image coding system converting method, and a recording medium for recording a program used to execute this converting method. More specifically, the present invention is directed to such image coding system converting apparatus, image coding system converting method, and recording medium, capable of converting a compression coding system while reducing a necessary calculation amount and suppressing a deterioration of an image quality.
Recently, electronic appliances capable of processing digital picture (image) signals are increased, and the digital picture signals used in these electronic appliances are compressed/coded in accordance with certain coding systems (will be referred to as an “image coding system” hereinafter). There is, however, no compatibility among different image coding systems from each other. Thus, a bit stream coded in one electronic appliance cannot be decoded by such an electronic appliance which performs a coding/decoding operation by using another image coding/decoding system, so that this coded bit stream cannot be reproduced by the latter-mentioned electronic appliance. For instance, when coded picture data which have been stored in a broadcasting station are broadcasted, the following needs may be sometimes made. That is, picture data which has been coded based upon one image coding system different from another image coding system used for the stored picture data is wanted to be decoded for a broadcasting purpose.
To satisfy such a request, the following compressing/coding system is required. That is, a bit stream which has been coded in accordance with a first image coding system is decoded, and this decoded bit stream is again encoded in accordance with a second image coding system. Normally, if the decoder adapted to the first image coding system is combined with the encoder adapted to the second image coding system, then it could realize such a converting apparatus capable of performing the above-explained picture data converting operation.
The major system related to the compressing/coding systems used in the image coding systems for digital picture signals is the hybrid type compressing/coding system. In this hybrid type compressing/coding system, the reduction of the spatial redundancy within the block performed by the DCT (discrete cosine transform) is combined with the reduction of the temporal redundancy between the frames performed by the motion compensation. Furthermore, the data is compressed by employing the entropy coding system. In an actual case, this coding system has been introduced into all of MPEG-1 used in a video CD and a video clip; MPEG-2 used in a DVD and a digital broadcasting system; ITU-T recommendation H.261 used in a television conference/television telephone; ITU-T recommendation H.263 used in a television telephone operable in an analog line; and also MPEG-4 expected as the moving picture coding system for the next generation. In this coding system, DCT, quantizing, motion-compensating, and variable-length coding operations are carried out.
As a result, in the system conversion among these coding systems, the structures of the actual bit streams are resembled to each other. Therefore, while the bit stream coded in accordance with the first image coding system is decoded, the bit amounts every picture and macro-block are counted, so that the process amount required for the bit rate control and the like when the decoded bit stream is coded in accordance with the second image coding system can be reduced.
For example, Japanese Patent Disclosure No. Hei-9-512410 discloses “METHOD FOR CODE-CONVERTING CODED VIDEO SIGNAL AND CODE CONVERTING APPARATUS WITH USING CODE-CONVERTING METHOD THEREOF” so as to reduce the process amount. Now, this code converting apparatus
2000
will be simply explained as prior art with reference to FIG.
17
.
FIG. 17
is a block diagram for simply representing the structural arrangement of the code converting apparatus described in Japanese Patent Disclosure No. Hei-9-512410. This code converting apparatus
2000
is arranged by employing the decoding sub-assembly
2001
and the coding sub-assembly
2002
. The decoding sub-assembly
2001
contains a demultiplexing circuit
2003
having a function for subdividing the input bit stream into the respective layers, and-the normal decoder
2004
. Also, the coding sub-assembly
2002
contains the frame memory
2005
, the delay circuit
2006
, the normal encoder
2007
, the bit rate control circuit
2008
, the target bit calculator
2009
, and the output buffer
2010
.
The decoder
2004
decodes the input bit stream which has been decoded, and contains the variable length decoding means, the dequantizing means, the inverse-DCT means, and the like. Also, the encoder
2007
encodes the non-compression image data, and contains the variable length coding means, the quantizing means, the DCT means, the frame memory, the motion compensating means, and the like. Also, both the bit rate control circuit
2008
and the target bit calculator
2009
determine the quantizing steps in the actual coding operation by referring to the bit amount of the output bit stream. It should be noted that the code converting apparatus
2000
is not equipped with a pre-analyzer having a similar circuit arrangement to that of an encoder. This pre-analyzer encodes an input image at a quantizing step preceding to the step for encoding the input image by the encoder.
Next, the operations of the code converting apparatus
2000
will now be simply explained.
The demultiplexing circuit
2003
separates the input bit stream into the coded data and the overhead other than this coded data, for example, the header information and the start code. Both the coded data and the overhead are supplied to the decoder
2004
and the target bit calculator
2009
, respectively. In the decoder
2004
, the supplied data is decoded, and the non-compression image data is sequentially written into the frame memory
2005
. The target bit calculator
2009
counts the bit amount “B” of each of the sub-images such as the macroblocks from both the data and the overhead. Next, the counted bit amounts “B” are added to each other over the entire image so as to acquire the bit amount “S” of one image. Furthermore, the activity “X” of this image is obtained by multiplexing a certain quantizing step “Q
2
” by the bit amount “S” of one image.
The target bit calculator
2009
contains the memory, and calculates the bit “T” of the present frame based upon the activity “Xpre” of the preceding frame and the obtained activity “X”. The target bit “T” is distributed to the local target value “Tn” every macroblock by the distributing circuit provided in the target bit calculator
2009
, and then the local target value “Tn” is sent to the bit rate control circuit
2008
. The bit rate control circuit
2008
calculates the quantizing step “Q
1
” to be corrected from the supplied local target value “Tn” and the condition “b” (packing density) of the output buffer
2010
, and then supplies the calculated quantizing step Q
1
to the quantizing means (not shown) employed in the encoder
2007
. After the non-compression image has passed through the delay circuit, this non-compression image is supplied to the encoder
2007
so as to be encoded. At this time, the quantizing means provided in the encoder
2007
quantizes the non-compression image by using the quantizing step Q
1
. The encoder
2007
sequentially outputs the encoded bit stream to the buffer
2010
.
As previously explained, the code converting apparatus
2000
can make the bit rate of the input bit stream equal to the bit rate of the output bit stream, while the pre-analyzer can be omitted, in such a manner that the bit stream is demultiplexed by the demultiplexing circuit
2003
and then the demultiplexed bit streams are entered to the target bit calculator
2009
.
However, in the above-described conventional code converting apparatus
2000
, when the demul
Iwasaki Osamu
Komiya Daisaku
Uenoyama Tsutomu
Matsushita Electric - Industrial Co., Ltd.
Mehta Bhavesh M.
Pearne & Gordon LLP
Sukhaphadhana Christopher
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