Ignition spark timing logic enabled phase generator

Details Ignition spark timing logic enabled phase generator Ignition spark timing logic enabled phase generator

1976-03-01

1978-03-21

Cox, Ronald B.

Internal-combustion engines

Intake manifold

Manifold tuning, balancing or pressure regulating means

F02P 504

Patent

active

040797090

ABSTRACT:
A spark timing circuit for use with the ignition system of an internal combustion engine is disclosed. Two sensors produce periodic digital logic signals which have frequencies related to the speed of the engine rotation and which differ by a predetermined amount of phase. These signals are coupled as inputs to a first exclusive OR gate which produces an output signal having logic states which correspond to the coincidence and non-coincidence of the logic states of the two input signals, the duration of one of the logic states of the output signal therefore being directly related to the phase difference between the first and second sensor signals. An adjustable pulse generator circuit then receives this output signal and produces a new corresponding synchronized digitial output signal having the duration of one of its logic states equal to an adjustable proportion of the phase difference logic state duration of the first exclusive OR gate output signal. This new output signal and one of the sensor signals are then coupled as inputs to a second exclusive OR gate. The output of the second OR gate then either represents one of the sensor signals which is totally shifted by an adjustable amount of phase (a first embodiment of the invention) or the output of the second OR gate is used to subsequently create a synchronized signal which corresponds to one of the sensor signals which is totally shifted by an adjustable amount of phase (a second embodiment of the invention). Thus an adjustable amount of total phase shift for a spark timing ignition signal has been produced by a simplified logic circuit which receives two sensor signals which differ by a predetermined amount of phase. The present invention is illustrated in a spark timing ignition system in which an advanced spark timing signal, a retarded spark timing signal or a zero phase (base) spark timing signal is selected by the logic inputs to a plurality of selector logic gates.

REFERENCES:
patent: 3901201 (1975-08-01), Mizuguchi

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