IGFET clock generator

Details IGFET clock generator IGFET clock generator

1976-09-13

1978-01-17

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307205, 307208, 307214, 307215, H03K 5159, H03K 504, H03K 1908, H03K 1934

Patent

active

040694291

ABSTRACT:
A circuit having an input terminal connected to one input of a NOR gate through three cascaded IGFET inverters and connected directly to the other input of the NOR gate for producing an output pulse in response to an input signal going from a first voltage level to a second voltage level. The output pulse has a width which is a function of the time delay imparted by the high resistance device of two unbalanced IGFET inverters and the parasitic capacitors at the output of each of the unbalanced inverters.

REFERENCES:
patent: 3588543 (1971-06-01), Schwartz
patent: 3628065 (1971-12-01), Hill
patent: 3755691 (1973-08-01), Cassarino
patent: 3851189 (1974-11-01), Moyer
patent: 3862440 (1975-01-01), Suzuki et al.

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