IEEE 488 interface for message handling method

Details IEEE 488 interface for message handling method IEEE 488 interface for message handling method

1990-07-03

1994-02-15

Lall, Parshotam S.

Boots, shoes, and leggings

36494081, 364DIG2, G06F 1342

Patent

active

052875288

ABSTRACT:
An IEEE 488 interface couples a microprocessor to one or more devices that are connected to an IEEE 488 bus. Message transmission speed is improved by overlapping a portion of the T1 bus settling time with the microprocessor's write pulse, when it is known that the data on the microprocessor's bus is valid for a predefined period of time before the write pulse's trailing edge. Improved handshake synchronization is achieved by generating an interrupt signal to notify the microprocessor that the last byte of an incoming message has been received. The terminal count signal generated by the microprocessor's DMA controller is used to detect the end of multiple byte messages sent by the microprocessor. The interface automatically generates an EOI signal on the IEEE 488 bus when the last byte of the message is asserted on the IEEE 488 bus data lines. This greatly simplifies the transmission of multiple byte messages by the microprocessor compared with the protocol used by prior art interfaces. The DMA controller's terminal count signal is also used to prevent the loss of data being sent by a device on the IEEE 488 bus to the microprocessor, which typically happens when the microprocessor has to service another device in the midst of receiving a long message from the first device. The loss of data is prevented by detecting a break point in the message transmission, i.e., when the DMA terminal count signal becomes active, and then holding off the first device from asserting "data valid".

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