Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2002-10-10
2004-03-23
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S144000, C341S131000, C341S123000
Reexamination Certificate
active
06710729
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a sigma-delta modulator. In particular, the present invention relates to a sigma-delta modulator comprising a dither generator.
2. Description of the Related Art
Sigma-delta techniques (as part of the digital-to-analog or analog-to-digital conversion function) are finding wide acceptance in many applications such as telephone codecs, compact disc (CD) players and the like. Sigma-delta techniques are popular because of the tolerance of the techniques to circuit variations present in integrated circuit fabrication processes. Hence, a sixteen or more bit linear converter may be implemented relatively inexpensively in integrated form, compared to more conventional circuit techniques such as flash converters or subranging converters.
Sigma-delta converters are not without drawbacks, however, since high bit rate processing is required, pushing low power technologies (such as CMOS) to their limits, especially with wide bandwidth signals such as digital audio. In addition, sigma-delta converters suffer from periodic noise and spurious tone generation (in-band and out-of-band) due to the feedback required to implement the converter, discussed in more detail below. Although the periodic noise and spurious tones typically occur at very low levels (for example, about 90 dB below full scale), they may be very objectionable to a user while having virtually no impact on a data acquisition system using the same converter. The noise and tones are typically noticeable when no, or a very low, desired signal is present. The periodic noise and tones are generally referred to as idle channel noise.
Conventional techniques for removing periodic noise and tones generally attempt to “whiten” the periodic noise and tones from the converter, thereby suppressing them. These techniques include adding a small dither signal (noise) or an out-of-band tone (such as a 25 KHz sine wave, which is above the human ear's hearing frequency range) to the input to the Sigma-delta converter. Generally, the addition of the dither signal is not regarded as wholly effective since it adds noise to the output of the converter (which may raise the noise floor of the converter) while not entirely suppressing the periodic noise and spurious tones. While the out-of-band tone insertion may reduce the in-band spurious tones, the dynamic range of the converter suffers since the converter now has to process the desired signal and out-of-band tone without saturation.
U.S. Pat. No. 5,144,308, entitled “Idle Channel Tone and Periodic Noise Suppression for Sigma-Delta Modulators Using High-Level Dither,” by Steven R. Norsworthy, issued Sep. 1, 1992, herein incorporated by reference, discloses a technique for using a digitally generated dither signal to improve the performance of a sigma-delta modulator by reducing the amount of periodic noise and spurious tones generated in the modulator output signal. However, employing a dither signal to improve the performance of a sigma-delta modulator in this respect may also reduce the dynamic range of the sigma-delta modulator. Thus, a need exists for a technique employing dither to reduce idle channel tones without substantially degrading or reducing the dynamic range of the sigma-delta modulator.
U.S. Pat. No. 5,745,061, entitled “Method of Improving the Stability of a Sigma-Delta Modulator Employing Dither,” by Norsworthy et al., filed Jul. 28, 1995, herein incorporated by reference, discloses a technique of employing dither to reduce idle channel tones without substantially degrading or reducing the dynamic range of the sigma-delta modulator. Because, in U.S. Pat. No. 5,745,061, a pseudo-random sequencer is required and the mechanism is more complex than that disclosed in U.S. Pat. No. 5,144,308, the hardware cost of the mechanism is high. A need exists for a technique of employing dither to reduce idle channel tones without high hardware costs.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a sigma-delta modulator to suppress idle channel tones without substantially degrading or reducing the dynamic range of the sigma-delta modulator.
Another object of the present invention is to provide a sigma-delta modulator, with simplified mechanism compared to the Prior Art, implemented to significantly decrease development and design costs.
In the invention, the sigma-delta modulator comprises an integrator, a first quantizer, a dither generator and an adding device. The integrator has an input terminal and an output terminal. A first random signal is generated by the first quantizer. An input terminal of the first quantizer is coupled to an output terminal of the integrator. An input terminal of the dither generator is coupled to an output terminal of the integrator. The dither generator comprises a second quantizer, a random sequencer and an attenuator. A second random signal is generated by the second quantizer. An input terminal of the second quantizer is coupled to the output of the integrator. The random sequencer receives the first random signal and the second random signal and produces a third random signal to be output. The third random signal is attenuated by the attenuator to produce a dither signal. The dither signal is output from the attenuator. The dither signal is added to the input terminal of the integrator by the adding device.
Furthermore, the invention provides another kind of dither generator. The dither generator comprises a single-bit quantizer and a random sequencer. A second random signal is generated by the single-bit quantizer. An input terminal of the single-bit quantizer is coupled to the output of the integrator. The random sequencer is a logic circuit digitally implementing XOR logic. The random sequencer receives the first random signal and the second random signal and produces a dither signal to be output. The dither signal is output from the random sequencer.
The invention provides another kind of dither generator. The dither generator comprises a comparator, a random sequencer, a single-bit digital-to-analog converter and an attenuator. A second random signal is generated by the comparator. An input terminal of the comparator is coupled to the output of the integrator. The random sequencer is a logic circuit digitally implementing XOR logic. The random sequencer receives the first random signal and the second random signal and produces a third random signal to be output. The third random signal is converted into an analog signal by the single-bit digital-to-analog converter. The analog signal is attenuated by the attenuator to produce a dither signal. The dither signal is output from the attenuator.
REFERENCES:
patent: 5144308 (1992-09-01), Norsworthy
patent: 5497154 (1996-03-01), Komamura
patent: 5815102 (1998-09-01), Melanson
patent: 5889482 (1999-03-01), Zarubinsky et al.
patent: 6150969 (2000-11-01), Melanson
Faraday Technology Corp.
Mai Lam
Rabin & Berdo P.C.
Tokar Michael
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